From owner-p4-projects@FreeBSD.ORG Mon Mar 2 09:36:57 2009 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id E59461065712; Mon, 2 Mar 2009 09:36:56 +0000 (UTC) Delivered-To: perforce@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 92E0E106570D for ; Mon, 2 Mar 2009 09:36:56 +0000 (UTC) (envelope-from lulf@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 819548FC25 for ; Mon, 2 Mar 2009 09:36:56 +0000 (UTC) (envelope-from lulf@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id n229auYr042959 for ; Mon, 2 Mar 2009 09:36:56 GMT (envelope-from lulf@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id n229auZu042957 for perforce@freebsd.org; Mon, 2 Mar 2009 09:36:56 GMT (envelope-from lulf@FreeBSD.org) Date: Mon, 2 Mar 2009 09:36:56 GMT Message-Id: <200903020936.n229auZu042957@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to lulf@FreeBSD.org using -f From: Ulf Lilleengen To: Perforce Change Reviews Cc: Subject: PERFORCE change 158580 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 02 Mar 2009 09:36:59 -0000 http://perforce.freebsd.org/chv.cgi?CH=158580 Change 158580 by lulf@lulf_carrot on 2009/03/02 09:36:20 - Add macro for flushing write buffer. - Flush writebuffer after cleaning cache. Affected files ... .. //depot/projects/avr32/src/sys/avr32/avr32/cache.c#3 edit .. //depot/projects/avr32/src/sys/avr32/include/cache.h#2 edit Differences ... ==== //depot/projects/avr32/src/sys/avr32/avr32/cache.c#3 (text+ko) ==== @@ -122,6 +122,10 @@ avr32_dcache_line_size = pow(2, bit_value(SYS, CONFIG1, DLSZ, config) + 1); avr32_dcache_ways = pow(2, bit_value(SYS, CONFIG1, DASS, config)); + printf("ICACHE: sz %d lsz %d assoc %d\n", avr32_icache_size, + avr32_icache_line_size, avr32_icache_ways); + printf("DCACHE: sz %d lsz %d assoc %d\n", avr32_dcache_size, + avr32_dcache_line_size, avr32_dcache_ways); /* log2(1) = 0, meaning no cache present. */ if (avr32_icache_line_size == 1) { @@ -207,7 +211,6 @@ /* Put address at a cache line boundary. */ va = trunc_line(from, avr32_dcache_line_size); va_end = round_line(from + size, avr32_dcache_line_size); - while (va < va_end) { cache_line_op(va, DCACHE_WRITEBACK_INVALIDATE); va += avr32_dcache_line_size; @@ -223,7 +226,6 @@ /* Put address at a cache line boundary. */ va = trunc_line(from, avr32_dcache_line_size); va_end = round_line(from + size, avr32_dcache_line_size); - while (va < va_end) { cache_line_op(va, DCACHE_INVALIDATE); va += avr32_dcache_line_size; @@ -243,4 +245,5 @@ cache_line_op(va, DCACHE_WRITEBACK); va += avr32_dcache_line_size; } + avr32_wbflush(); } ==== //depot/projects/avr32/src/sys/avr32/include/cache.h#2 (text+ko) ==== @@ -152,5 +152,8 @@ #define avr32_dcache_wb_range(v, s) \ __mco_2args(, dcache_wb_range, (v), (s)) +/* For flushing the write buffer. */ +#define avr32_wbflush() __asm__ __volatile("sync 0" : : : "memory") + void avr32_config_cache(void); void avr32_dcache_compute_align(void);