From owner-freebsd-net@FreeBSD.ORG Thu Nov 4 21:36:39 2010 Return-Path: Delivered-To: freebsd-net@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0601D1065674 for ; Thu, 4 Nov 2010 21:36:39 +0000 (UTC) (envelope-from kfl@xiplink.com) Received: from smtp131.iad.emailsrvr.com (smtp131.iad.emailsrvr.com [207.97.245.131]) by mx1.freebsd.org (Postfix) with ESMTP id B949C8FC16 for ; Thu, 4 Nov 2010 21:36:38 +0000 (UTC) Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp43.relay.iad1a.emailsrvr.com (SMTP Server) with ESMTP id D85942D08F2; Thu, 4 Nov 2010 17:20:15 -0400 (EDT) X-Virus-Scanned: OK Received: by smtp43.relay.iad1a.emailsrvr.com (Authenticated sender: kfodil-lemelin-AT-xiplink.com) with ESMTPSA id 425F62D09F2; Thu, 4 Nov 2010 17:20:12 -0400 (EDT) Message-ID: <4CD3238D.7080103@xiplink.com> Date: Thu, 04 Nov 2010 17:20:13 -0400 From: Karim Fodil-Lemelin User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.9.2.12) Gecko/20101027 Thunderbird/3.1.6 MIME-Version: 1.0 To: yongari@freebsd.org, freebsd-net@freebsd.org Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Subject: if_msk.c patch for yukon ec hanging X-BeenThere: freebsd-net@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Networking and TCP/IP with FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Nov 2010 21:36:39 -0000 Hello, I'd like to summit a patch that fixes a hanging issue related to Rx FIFO overrun on the following chips and rev (tested): ID: CHIP_ID_YUKON_EC REV: CHIP_REV_YU_EC_A2 CHIP_REV_YU_EC_A3 (I haven't tested it on CHIP_REV_YU_EC_A1) @@ -3813,16 +3805,24 @@ GMR_FS_ANY_ERR); } - /* - * Set Rx FIFO flush threshold to 64 bytes + 1 FIFO word - * due to hardware hang on receipt of pause frames. - */ - reg = RX_GMF_FL_THR_DEF + 1; - /* Another magic for Yukon FE+ - From Linux. */ - if (sc->msk_hw_id == CHIP_ID_YUKON_FE_P && - sc->msk_hw_rev == CHIP_REV_YU_FE_P_A0) - reg = 0x178; - CSR_WRITE_2(sc, MR_ADDR(sc_if->msk_port, RX_GMF_FL_THR), reg); + if (sc->msk_hw_id == CHIP_ID_YUKON_EC){ + /* Set Rx FIFO flush threshold to 64 bytes. */ + CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, RX_GMF_FL_THR), + RX_GMF_FL_THR_DEF); + } + else { + /* + * Set Rx FIFO flush threshold to 64 bytes + 1 FIFO word + * due to hardware hang on receipt of pause frames. + */ + reg = RX_GMF_FL_THR_DEF + 1; + /* Another magic for Yukon FE+ - From Linux. */ + if (sc->msk_hw_id == CHIP_ID_YUKON_FE_P && + sc->msk_hw_rev == CHIP_REV_YU_FE_P_A0) + reg = 0x178; + CSR_WRITE_2(sc, MR_ADDR(sc_if->msk_port, RX_GMF_FL_THR), reg); + } /* Configure Tx MAC FIFO. */ CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, TX_GMF_CTRL_T), GMF_RST_SET); The symptoms of the problem was that if a large amount of small TCP packets were fired up at the interface it would generate an interrupt from MAC1 with a GMAC status of 0x7 and while the chip Tx would still function the Rx would 'hang'. Triggering a watchdog timeout would make it work again sometimes but calling mskc_reset() didn't worked at all. It turned out that we had an old driver written by Pyun YongHyeon that would work flawlessly on that chip. This patch helps support that old chip. I hope this helps someone, Karim. PS: The patch line numbers are against 'CURRENT' r214406 but should also apply to FBSD 7 and 8.