Date: Mon, 12 Jan 2015 22:32:01 +0000 (UTC) From: Gleb Smirnoff <glebius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r277094 - in projects/ifnet: contrib/compiler-rt/lib/builtins lib/libc/arm/gen lib/libc/gen lib/libc/mips/gen lib/libc/powerpc/gen lib/libc/powerpc64/gen lib/libc/sparc64/gen sys/dev/ix... Message-ID: <201501122232.t0CMW1WE077495@svn.freebsd.org>
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Author: glebius Date: Mon Jan 12 22:32:00 2015 New Revision: 277094 URL: https://svnweb.freebsd.org/changeset/base/277094 Log: Merge head. Added: projects/ifnet/lib/libc/gen/trivial-getcontextx.c - copied unchanged from r277093, head/lib/libc/gen/trivial-getcontextx.c Deleted: projects/ifnet/lib/libc/arm/gen/getcontextx.c projects/ifnet/lib/libc/mips/gen/getcontextx.c projects/ifnet/lib/libc/powerpc/gen/getcontextx.c projects/ifnet/lib/libc/powerpc64/gen/getcontextx.c projects/ifnet/lib/libc/sparc64/gen/getcontextx.c Modified: projects/ifnet/contrib/compiler-rt/lib/builtins/clear_cache.c projects/ifnet/lib/libc/arm/gen/Makefile.inc projects/ifnet/lib/libc/mips/gen/Makefile.inc projects/ifnet/lib/libc/powerpc/gen/Makefile.inc projects/ifnet/lib/libc/powerpc64/gen/Makefile.inc projects/ifnet/lib/libc/sparc64/gen/Makefile.inc projects/ifnet/sys/dev/ixl/i40e_adminq.c projects/ifnet/sys/dev/ixl/i40e_adminq.h projects/ifnet/sys/dev/ixl/i40e_adminq_cmd.h projects/ifnet/sys/dev/ixl/i40e_common.c projects/ifnet/sys/dev/ixl/i40e_lan_hmc.c projects/ifnet/sys/dev/ixl/i40e_nvm.c projects/ifnet/sys/dev/ixl/i40e_prototype.h projects/ifnet/sys/dev/ixl/i40e_register.h projects/ifnet/sys/dev/ixl/i40e_type.h projects/ifnet/sys/dev/ixl/i40e_virtchnl.h projects/ifnet/sys/dev/ixl/if_ixl.c projects/ifnet/sys/dev/ixl/if_ixlv.c projects/ifnet/sys/dev/ixl/ixl.h projects/ifnet/sys/dev/ixl/ixl_txrx.c projects/ifnet/sys/dev/mii/brgphy.c projects/ifnet/sys/dev/mii/ciphy.c projects/ifnet/sys/dev/mii/e1000phy.c projects/ifnet/sys/dev/mii/ip1000phy.c projects/ifnet/sys/dev/mii/jmphy.c projects/ifnet/sys/dev/mii/mii.c projects/ifnet/sys/dev/mii/miivar.h projects/ifnet/sys/dev/mii/mlphy.c projects/ifnet/sys/dev/mii/nsphy.c projects/ifnet/sys/dev/mii/rgephy.c projects/ifnet/sys/dev/mii/rlphy.c projects/ifnet/sys/dev/mii/tlphy.c projects/ifnet/sys/fs/msdosfs/msdosfs_conv.c projects/ifnet/sys/fs/msdosfs/msdosfs_fat.c projects/ifnet/sys/fs/msdosfs/msdosfs_lookup.c projects/ifnet/sys/modules/ixl/Makefile projects/ifnet/sys/modules/ixlv/Makefile projects/ifnet/usr.sbin/makefs/ffs.c Directory Properties: projects/ifnet/ (props changed) projects/ifnet/contrib/compiler-rt/ (props changed) projects/ifnet/lib/libc/ (props changed) projects/ifnet/sys/ (props changed) Modified: projects/ifnet/contrib/compiler-rt/lib/builtins/clear_cache.c ============================================================================== --- projects/ifnet/contrib/compiler-rt/lib/builtins/clear_cache.c Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/contrib/compiler-rt/lib/builtins/clear_cache.c Mon Jan 12 22:32:00 2015 (r277094) @@ -13,6 +13,11 @@ #if __APPLE__ #include <libkern/OSCacheControl.h> #endif +#if defined(__FreeBSD__) && defined(__arm__) + #include <sys/types.h> + #include <machine/sysarch.h> +#endif + #if defined(__NetBSD__) && defined(__arm__) #include <machine/sysarch.h> #endif @@ -39,7 +44,7 @@ void __clear_cache(void *start, void *en * so there is nothing to do */ #elif defined(__arm__) && !defined(__APPLE__) - #if defined(__NetBSD__) + #if defined(__FreeBSD__) || defined(__NetBSD__) struct arm_sync_icache_args arg; arg.addr = (uintptr_t)start; Modified: projects/ifnet/lib/libc/arm/gen/Makefile.inc ============================================================================== --- projects/ifnet/lib/libc/arm/gen/Makefile.inc Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/lib/libc/arm/gen/Makefile.inc Mon Jan 12 22:32:00 2015 (r277094) @@ -2,9 +2,10 @@ # $FreeBSD$ SRCS+= _ctx_start.S _setjmp.S _set_tp.c alloca.S fabs.c \ - getcontextx.c infinity.c ldexp.c makecontext.c \ + infinity.c ldexp.c makecontext.c \ __aeabi_read_tp.S setjmp.S signalcontext.c sigsetjmp.S flt_rounds.c \ - arm_initfini.c + arm_initfini.c \ + trivial-getcontextx.c .if ${MACHINE_ARCH} == "armv6hf" SRCS+= fpgetmask_vfp.c fpgetround_vfp.c fpgetsticky_vfp.c fpsetmask_vfp.c \ Copied: projects/ifnet/lib/libc/gen/trivial-getcontextx.c (from r277093, head/lib/libc/gen/trivial-getcontextx.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/ifnet/lib/libc/gen/trivial-getcontextx.c Mon Jan 12 22:32:00 2015 (r277094, copy of r277093, head/lib/libc/gen/trivial-getcontextx.c) @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2011 Konstantin Belousov <kib@FreeBSD.org> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/types.h> +#include <sys/ucontext.h> +#include <errno.h> +#include <stdlib.h> + +int +__getcontextx_size(void) +{ + + return (sizeof(ucontext_t)); +} + +int +__fillcontextx2(char *ctx) +{ + + return (0); +} + +int +__fillcontextx(char *ctx) +{ + ucontext_t *ucp; + + ucp = (ucontext_t *)ctx; + return (getcontext(ucp)); +} + +__weak_reference(__getcontextx, getcontextx); + +ucontext_t * +__getcontextx(void) +{ + char *ctx; + int error; + + ctx = malloc(__getcontextx_size()); + if (ctx == NULL) + return (NULL); + if (__fillcontextx(ctx) == -1) { + error = errno; + free(ctx); + errno = error; + return (NULL); + } + return ((ucontext_t *)ctx); +} Modified: projects/ifnet/lib/libc/mips/gen/Makefile.inc ============================================================================== --- projects/ifnet/lib/libc/mips/gen/Makefile.inc Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/lib/libc/mips/gen/Makefile.inc Mon Jan 12 22:32:00 2015 (r277094) @@ -6,5 +6,6 @@ SRCS+= infinity.c fabs.c ldexp.c # SRCS+= flt_rounds.c fpgetmask.c fpgetround.c fpgetsticky.c fpsetmask.c \ # fpsetround.c fpsetsticky.c -SRCS+= _ctx_start.S _set_tp.c _setjmp.S getcontextx.c makecontext.c \ - setjmp.S signalcontext.c sigsetjmp.S +SRCS+= _ctx_start.S _set_tp.c _setjmp.S makecontext.c \ + setjmp.S signalcontext.c sigsetjmp.S \ + trivial-getcontextx.c Modified: projects/ifnet/lib/libc/powerpc/gen/Makefile.inc ============================================================================== --- projects/ifnet/lib/libc/powerpc/gen/Makefile.inc Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/lib/libc/powerpc/gen/Makefile.inc Mon Jan 12 22:32:00 2015 (r277094) @@ -1,9 +1,11 @@ # $FreeBSD$ SRCS += _ctx_start.S eabi.S fabs.S flt_rounds.c fpgetmask.c fpgetround.c \ - fpgetsticky.c fpsetmask.c fpsetround.c getcontextx.c \ + fpgetsticky.c fpsetmask.c fpsetround.c \ infinity.c ldexp.c makecontext.c _setjmp.S \ setjmp.S sigsetjmp.S signalcontext.c syncicache.c \ - _set_tp.c + _set_tp.c \ + trivial-getcontextx.c + Modified: projects/ifnet/lib/libc/powerpc64/gen/Makefile.inc ============================================================================== --- projects/ifnet/lib/libc/powerpc64/gen/Makefile.inc Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/lib/libc/powerpc64/gen/Makefile.inc Mon Jan 12 22:32:00 2015 (r277094) @@ -1,9 +1,10 @@ # $FreeBSD$ SRCS += _ctx_start.S fabs.S flt_rounds.c fpgetmask.c fpgetround.c \ - fpgetsticky.c fpsetmask.c fpsetround.c getcontextx.c \ + fpgetsticky.c fpsetmask.c fpsetround.c \ infinity.c ldexp.c makecontext.c _setjmp.S \ setjmp.S sigsetjmp.S signalcontext.c syncicache.c \ - _set_tp.c + _set_tp.c \ + trivial-getcontextx.c Modified: projects/ifnet/lib/libc/sparc64/gen/Makefile.inc ============================================================================== --- projects/ifnet/lib/libc/sparc64/gen/Makefile.inc Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/lib/libc/sparc64/gen/Makefile.inc Mon Jan 12 22:32:00 2015 (r277094) @@ -2,5 +2,6 @@ SRCS+= _ctx_start.S _setjmp.S fabs.S fixunsdfsi.S flt_rounds.c fpgetmask.c \ fpgetround.c fpgetsticky.c fpsetmask.c fpsetround.c \ - getcontextx.c infinity.c ldexp.c makecontext.c \ - signalcontext.c setjmp.S sigsetjmp.S _set_tp.c + infinity.c ldexp.c makecontext.c \ + signalcontext.c setjmp.S sigsetjmp.S _set_tp.c \ + trivial-getcontextx.c Modified: projects/ifnet/sys/dev/ixl/i40e_adminq.c ============================================================================== --- projects/ifnet/sys/dev/ixl/i40e_adminq.c Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/sys/dev/ixl/i40e_adminq.c Mon Jan 12 22:32:00 2015 (r277094) @@ -589,10 +589,10 @@ enum i40e_status_code i40e_init_adminq(s if (ret_code != I40E_SUCCESS) goto init_adminq_free_asq; - if (i40e_is_vf(hw)) /* VF has no need of firmware */ - goto init_adminq_exit; - -/* There are some cases where the firmware may not be quite ready + /* VF has no need of firmware */ + if (i40e_is_vf(hw)) + goto init_adminq_exit; + /* There are some cases where the firmware may not be quite ready * for AdminQ operations, so we retry the AdminQ setup a few times * if we see timeouts in this first AQ call. */ @@ -600,6 +600,7 @@ enum i40e_status_code i40e_init_adminq(s ret_code = i40e_aq_get_firmware_version(hw, &hw->aq.fw_maj_ver, &hw->aq.fw_min_ver, + &hw->aq.fw_build, &hw->aq.api_maj_ver, &hw->aq.api_min_ver, NULL); @@ -625,7 +626,8 @@ enum i40e_status_code i40e_init_adminq(s /* pre-emptive resource lock release */ i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL); - hw->aq.nvm_busy = FALSE; + hw->aq.nvm_release_on_done = FALSE; + hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; ret_code = i40e_aq_set_hmc_resource_profile(hw, I40E_HMC_PROFILE_DEFAULT, @@ -767,12 +769,6 @@ enum i40e_status_code i40e_asq_send_comm goto asq_send_command_exit; } - if (i40e_is_nvm_update_op(desc) && hw->aq.nvm_busy) { - i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, "AQTX: NVM busy.\n"); - status = I40E_ERR_NVM; - goto asq_send_command_exit; - } - details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); if (cmd_details) { i40e_memcpy(details, @@ -924,9 +920,6 @@ enum i40e_status_code i40e_asq_send_comm status = I40E_ERR_ADMIN_QUEUE_TIMEOUT; } - if (!status && i40e_is_nvm_update_op(desc)) - hw->aq.nvm_busy = TRUE; - asq_send_command_error: i40e_release_spinlock(&hw->aq.asq_spinlock); asq_send_command_exit: @@ -1042,7 +1035,6 @@ clean_arq_element_out: i40e_release_spinlock(&hw->aq.arq_spinlock); if (i40e_is_nvm_update_op(&e->desc)) { - hw->aq.nvm_busy = FALSE; if (hw->aq.nvm_release_on_done) { i40e_release_nvm(hw); hw->aq.nvm_release_on_done = FALSE; Modified: projects/ifnet/sys/dev/ixl/i40e_adminq.h ============================================================================== --- projects/ifnet/sys/dev/ixl/i40e_adminq.h Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/sys/dev/ixl/i40e_adminq.h Mon Jan 12 22:32:00 2015 (r277094) @@ -36,6 +36,7 @@ #define _I40E_ADMINQ_H_ #include "i40e_osdep.h" +#include "i40e_status.h" #include "i40e_adminq_cmd.h" #define I40E_ADMINQ_DESC(R, i) \ @@ -100,9 +101,9 @@ struct i40e_adminq_info { u16 asq_buf_size; /* send queue buffer size */ u16 fw_maj_ver; /* firmware major version */ u16 fw_min_ver; /* firmware minor version */ + u32 fw_build; /* firmware build number */ u16 api_maj_ver; /* api major version */ u16 api_min_ver; /* api minor version */ - bool nvm_busy; bool nvm_release_on_done; struct i40e_spinlock asq_spinlock; /* Send queue spinlock */ @@ -115,7 +116,7 @@ struct i40e_adminq_info { /* general information */ #define I40E_AQ_LARGE_BUF 512 -#define I40E_ASQ_CMD_TIMEOUT 100 /* msecs */ +#define I40E_ASQ_CMD_TIMEOUT 250 /* msecs */ void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, u16 opcode); Modified: projects/ifnet/sys/dev/ixl/i40e_adminq_cmd.h ============================================================================== --- projects/ifnet/sys/dev/ixl/i40e_adminq_cmd.h Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/sys/dev/ixl/i40e_adminq_cmd.h Mon Jan 12 22:32:00 2015 (r277094) @@ -263,6 +263,9 @@ enum i40e_admin_queue_opc { i40e_aqc_opc_lldp_delete_tlv = 0x0A04, i40e_aqc_opc_lldp_stop = 0x0A05, i40e_aqc_opc_lldp_start = 0x0A06, + i40e_aqc_opc_get_cee_dcb_cfg = 0x0A07, + i40e_aqc_opc_lldp_set_local_mib = 0x0A08, + i40e_aqc_opc_lldp_stop_start_spec_agent = 0x0A09, /* Tunnel commands */ i40e_aqc_opc_add_udp_tunnel = 0x0B00, @@ -275,6 +278,8 @@ enum i40e_admin_queue_opc { /* OEM commands */ i40e_aqc_opc_oem_parameter_change = 0xFE00, i40e_aqc_opc_oem_device_status_change = 0xFE01, + i40e_aqc_opc_oem_ocsd_initialize = 0xFE02, + i40e_aqc_opc_oem_ocbb_initialize = 0xFE03, /* debug commands */ i40e_aqc_opc_debug_get_deviceid = 0xFF00, @@ -283,7 +288,6 @@ enum i40e_admin_queue_opc { i40e_aqc_opc_debug_write_reg = 0xFF04, i40e_aqc_opc_debug_modify_reg = 0xFF07, i40e_aqc_opc_debug_dump_internals = 0xFF08, - i40e_aqc_opc_debug_modify_internals = 0xFF09, }; /* command structures and indirect data structures */ @@ -417,6 +421,7 @@ struct i40e_aqc_list_capabilities_elemen #define I40E_AQ_CAP_ID_VSI 0x0017 #define I40E_AQ_CAP_ID_DCB 0x0018 #define I40E_AQ_CAP_ID_FCOE 0x0021 +#define I40E_AQ_CAP_ID_ISCSI 0x0022 #define I40E_AQ_CAP_ID_RSS 0x0040 #define I40E_AQ_CAP_ID_RXQ 0x0041 #define I40E_AQ_CAP_ID_TXQ 0x0042 @@ -461,8 +466,11 @@ struct i40e_aqc_arp_proxy_data { __le32 pfpm_proxyfc; __le32 ip_addr; u8 mac_addr[6]; + u8 reserved[2]; }; +I40E_CHECK_STRUCT_LEN(0x14, i40e_aqc_arp_proxy_data); + /* Set NS Proxy Table Entry Command (indirect 0x0105) */ struct i40e_aqc_ns_proxy_data { __le16 table_idx_mac_addr_0; @@ -488,6 +496,8 @@ struct i40e_aqc_ns_proxy_data { u8 ipv6_addr_1[16]; }; +I40E_CHECK_STRUCT_LEN(0x3c, i40e_aqc_ns_proxy_data); + /* Manage LAA Command (0x0106) - obsolete */ struct i40e_aqc_mng_laa { __le16 command_flags; @@ -498,6 +508,8 @@ struct i40e_aqc_mng_laa { u8 reserved2[6]; }; +I40E_CHECK_CMD_LENGTH(i40e_aqc_mng_laa); + /* Manage MAC Address Read Command (indirect 0x0107) */ struct i40e_aqc_mac_address_read { __le16 command_flags; @@ -569,6 +581,8 @@ struct i40e_aqc_get_switch_config_header u8 reserved[12]; }; +I40E_CHECK_CMD_LENGTH(i40e_aqc_get_switch_config_header_resp); + struct i40e_aqc_switch_config_element_resp { u8 element_type; #define I40E_AQ_SW_ELEM_TYPE_MAC 1 @@ -594,6 +608,8 @@ struct i40e_aqc_switch_config_element_re __le16 element_info; }; +I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_config_element_resp); + /* Get Switch Configuration (indirect 0x0200) * an array of elements are returned in the response buffer * the first in the array is the header, remainder are elements @@ -603,6 +619,8 @@ struct i40e_aqc_get_switch_config_resp { struct i40e_aqc_switch_config_element_resp element[1]; }; +I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_switch_config_resp); + /* Add Statistics (direct 0x0201) * Remove Statistics (direct 0x0202) */ @@ -668,6 +686,8 @@ struct i40e_aqc_switch_resource_alloc_el u8 reserved2[6]; }; +I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_resource_alloc_element_resp); + /* Add VSI (indirect 0x0210) * this indirect command uses struct i40e_aqc_vsi_properties_data * as the indirect buffer (128 bytes) @@ -1099,6 +1119,8 @@ struct i40e_aqc_remove_tag { u8 reserved[12]; }; +I40E_CHECK_CMD_LENGTH(i40e_aqc_remove_tag); + /* Add multicast E-Tag (direct 0x0257) * del multicast E-Tag (direct 0x0258) only uses pv_seid and etag fields * and no external data @@ -1214,7 +1236,7 @@ struct i40e_aqc_add_remove_cloud_filters } ipaddr; __le16 flags; #define I40E_AQC_ADD_CLOUD_FILTER_SHIFT 0 -#define I40E_AQC_ADD_CLOUD_FILTER_MASK (0x3F << \ +#define I40E_AQC_ADD_CLOUD_FILTER_MASK (0x3F << \ I40E_AQC_ADD_CLOUD_FILTER_SHIFT) /* 0x0000 reserved */ #define I40E_AQC_ADD_CLOUD_FILTER_OIP 0x0001 @@ -1247,7 +1269,7 @@ struct i40e_aqc_add_remove_cloud_filters u8 reserved[4]; __le16 queue_number; #define I40E_AQC_ADD_CLOUD_QUEUE_SHIFT 0 -#define I40E_AQC_ADD_CLOUD_QUEUE_MASK (0x3F << \ +#define I40E_AQC_ADD_CLOUD_QUEUE_MASK (0x7FF << \ I40E_AQC_ADD_CLOUD_QUEUE_SHIFT) u8 reserved2[14]; /* response section */ @@ -1366,6 +1388,8 @@ struct i40e_aqc_configure_vsi_ets_sla_bw u8 reserved1[28]; }; +I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_configure_vsi_ets_sla_bw_data); + /* Configure VSI Bandwidth Allocation per Traffic Type (indirect 0x0407) * responds with i40e_aqc_qs_handles_resp */ @@ -1377,6 +1401,8 @@ struct i40e_aqc_configure_vsi_tc_bw_data __le16 qs_handles[8]; }; +I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_configure_vsi_tc_bw_data); + /* Query vsi bw configuration (indirect 0x0408) */ struct i40e_aqc_query_vsi_bw_config_resp { u8 tc_valid_bits; @@ -1390,6 +1416,8 @@ struct i40e_aqc_query_vsi_bw_config_resp u8 reserved3[23]; }; +I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_query_vsi_bw_config_resp); + /* Query VSI Bandwidth Allocation per Traffic Type (indirect 0x040A) */ struct i40e_aqc_query_vsi_ets_sla_config_resp { u8 tc_valid_bits; @@ -1401,6 +1429,8 @@ struct i40e_aqc_query_vsi_ets_sla_config __le16 tc_bw_max[2]; }; +I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_query_vsi_ets_sla_config_resp); + /* Configure Switching Component Bandwidth Limit (direct 0x0410) */ struct i40e_aqc_configure_switching_comp_bw_limit { __le16 seid; @@ -1428,6 +1458,8 @@ struct i40e_aqc_configure_switching_comp u8 reserved2[96]; }; +I40E_CHECK_STRUCT_LEN(0x80, i40e_aqc_configure_switching_comp_ets_data); + /* Configure Switching Component Bandwidth Limits per Tc (indirect 0x0416) */ struct i40e_aqc_configure_switching_comp_ets_bw_limit_data { u8 tc_valid_bits; @@ -1439,6 +1471,8 @@ struct i40e_aqc_configure_switching_comp u8 reserved1[28]; }; +I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_configure_switching_comp_ets_bw_limit_data); + /* Configure Switching Component Bandwidth Allocation per Tc * (indirect 0x0417) */ @@ -1450,6 +1484,8 @@ struct i40e_aqc_configure_switching_comp u8 reserved1[20]; }; +I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_configure_switching_comp_bw_config_data); + /* Query Switching Component Configuration (indirect 0x0418) */ struct i40e_aqc_query_switching_comp_ets_config_resp { u8 tc_valid_bits; @@ -1460,6 +1496,8 @@ struct i40e_aqc_query_switching_comp_ets u8 reserved2[23]; }; +I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_query_switching_comp_ets_config_resp); + /* Query PhysicalPort ETS Configuration (indirect 0x0419) */ struct i40e_aqc_query_port_ets_config_resp { u8 reserved[4]; @@ -1475,6 +1513,8 @@ struct i40e_aqc_query_port_ets_config_re u8 reserved3[32]; }; +I40E_CHECK_STRUCT_LEN(0x44, i40e_aqc_query_port_ets_config_resp); + /* Query Switching Component Bandwidth Allocation per Traffic Type * (indirect 0x041A) */ @@ -1489,6 +1529,8 @@ struct i40e_aqc_query_switching_comp_bw_ __le16 tc_bw_max[2]; }; +I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_query_switching_comp_bw_config_resp); + /* Suspend/resume port TX traffic * (direct 0x041B and 0x041C) uses the generic SEID struct */ @@ -1502,6 +1544,8 @@ struct i40e_aqc_configure_partition_bw_d u8 max_bw[16]; /* bandwidth limit */ }; +I40E_CHECK_STRUCT_LEN(0x22, i40e_aqc_configure_partition_bw_data); + /* Get and set the active HMC resource profile and status. * (direct 0x0500) and (direct 0x0501) */ @@ -1584,6 +1628,8 @@ struct i40e_aqc_module_desc { u8 reserved2[8]; }; +I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_module_desc); + struct i40e_aq_get_phy_abilities_resp { __le32 phy_type; /* bitmap using the above enum for offsets */ u8 link_speed; /* bitmap using the above enum bit patterns */ @@ -1612,6 +1658,8 @@ struct i40e_aq_get_phy_abilities_resp { struct i40e_aqc_module_desc qualified_module[I40E_AQ_PHY_MAX_QMS]; }; +I40E_CHECK_STRUCT_LEN(0x218, i40e_aq_get_phy_abilities_resp); + /* Set PHY Config (direct 0x0601) */ struct i40e_aq_set_phy_config { /* same bits as above in all */ __le32 phy_type; @@ -1795,12 +1843,12 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_updat /* NVM Config Read (indirect 0x0704) */ struct i40e_aqc_nvm_config_read { __le16 cmd_flags; -#define ANVM_SINGLE_OR_MULTIPLE_FEATURES_MASK 1 -#define ANVM_READ_SINGLE_FEATURE 0 -#define ANVM_READ_MULTIPLE_FEATURES 1 +#define I40E_AQ_ANVM_SINGLE_OR_MULTIPLE_FEATURES_MASK 1 +#define I40E_AQ_ANVM_READ_SINGLE_FEATURE 0 +#define I40E_AQ_ANVM_READ_MULTIPLE_FEATURES 1 __le16 element_count; - __le16 element_id; /* Feature/field ID */ - u8 reserved[2]; + __le16 element_id; /* Feature/field ID */ + __le16 element_id_msw; /* MSWord of field ID */ __le32 address_high; __le32 address_low; }; @@ -1818,21 +1866,31 @@ struct i40e_aqc_nvm_config_write { I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_config_write); +/* Used for 0x0704 as well as for 0x0705 commands */ +#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT 1 +#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_MASK (1 << I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT) +#define I40E_AQ_ANVM_FEATURE 0 +#define I40E_AQ_ANVM_IMMEDIATE_FIELD (1 << FEATURE_OR_IMMEDIATE_SHIFT) struct i40e_aqc_nvm_config_data_feature { __le16 feature_id; - __le16 instance_id; +#define I40E_AQ_ANVM_FEATURE_OPTION_OEM_ONLY 0x01 +#define I40E_AQ_ANVM_FEATURE_OPTION_DWORD_MAP 0x08 +#define I40E_AQ_ANVM_FEATURE_OPTION_POR_CSR 0x10 __le16 feature_options; __le16 feature_selection; }; +I40E_CHECK_STRUCT_LEN(0x6, i40e_aqc_nvm_config_data_feature); + struct i40e_aqc_nvm_config_data_immediate_field { -#define ANVM_FEATURE_OR_IMMEDIATE_MASK 0x2 - __le16 field_id; - __le16 instance_id; + __le32 field_id; + __le32 field_value; __le16 field_options; - __le16 field_value; + __le16 reserved; }; +I40E_CHECK_STRUCT_LEN(0xc, i40e_aqc_nvm_config_data_immediate_field); + /* Send to PF command (indirect 0x0801) id is only used by PF * Send to VF command (indirect 0x0802) id is only used by PF * Send to Peer PF command (indirect 0x0803) @@ -1995,9 +2053,77 @@ struct i40e_aqc_lldp_start { I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_start); -/* Apply MIB changes (0x0A07) - * uses the generic struc as it contains no data +/* Get CEE DCBX Oper Config (0x0A07) + * uses the generic descriptor struct + * returns below as indirect response + */ + +#define I40E_AQC_CEE_APP_FCOE_SHIFT 0x0 +#define I40E_AQC_CEE_APP_FCOE_MASK (0x7 << I40E_AQC_CEE_APP_FCOE_SHIFT) +#define I40E_AQC_CEE_APP_ISCSI_SHIFT 0x3 +#define I40E_AQC_CEE_APP_ISCSI_MASK (0x7 << I40E_AQC_CEE_APP_ISCSI_SHIFT) +#define I40E_AQC_CEE_APP_FIP_SHIFT 0x8 +#define I40E_AQC_CEE_APP_FIP_MASK (0x7 << I40E_AQC_CEE_APP_FIP_SHIFT) +#define I40E_AQC_CEE_PG_STATUS_SHIFT 0x0 +#define I40E_AQC_CEE_PG_STATUS_MASK (0x7 << I40E_AQC_CEE_PG_STATUS_SHIFT) +#define I40E_AQC_CEE_PFC_STATUS_SHIFT 0x3 +#define I40E_AQC_CEE_PFC_STATUS_MASK (0x7 << I40E_AQC_CEE_PFC_STATUS_SHIFT) +#define I40E_AQC_CEE_APP_STATUS_SHIFT 0x8 +#define I40E_AQC_CEE_APP_STATUS_MASK (0x7 << I40E_AQC_CEE_APP_STATUS_SHIFT) +struct i40e_aqc_get_cee_dcb_cfg_v1_resp { + u8 reserved1; + u8 oper_num_tc; + u8 oper_prio_tc[4]; + u8 reserved2; + u8 oper_tc_bw[8]; + u8 oper_pfc_en; + u8 reserved3; + __le16 oper_app_prio; + u8 reserved4; + __le16 tlv_status; +}; + +I40E_CHECK_STRUCT_LEN(0x18, i40e_aqc_get_cee_dcb_cfg_v1_resp); + +struct i40e_aqc_get_cee_dcb_cfg_resp { + u8 oper_num_tc; + u8 oper_prio_tc[4]; + u8 oper_tc_bw[8]; + u8 oper_pfc_en; + __le16 oper_app_prio; + __le32 tlv_status; + u8 reserved[12]; +}; + +I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_cee_dcb_cfg_resp); + +/* Set Local LLDP MIB (indirect 0x0A08) + * Used to replace the local MIB of a given LLDP agent. e.g. DCBx + */ +struct i40e_aqc_lldp_set_local_mib { +#define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT 0 +#define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT) + u8 type; + u8 reserved0; + __le16 length; + u8 reserved1[4]; + __le32 address_high; + __le32 address_low; +}; + +I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_set_local_mib); + +/* Stop/Start LLDP Agent (direct 0x0A09) + * Used for stopping/starting specific LLDP agent. e.g. DCBx */ +struct i40e_aqc_lldp_stop_start_specific_agent { +#define I40E_AQC_START_SPECIFIC_AGENT_SHIFT 0 +#define I40E_AQC_START_SPECIFIC_AGENT_MASK (1 << I40E_AQC_START_SPECIFIC_AGENT_SHIFT) + u8 command; + u8 reserved[15]; +}; + +I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_stop_start_specific_agent); /* Add Udp Tunnel command and completion (direct 0x0B00) */ struct i40e_aqc_add_udp_tunnel { @@ -2073,7 +2199,8 @@ struct i40e_aqc_oem_param_change { #define I40E_AQ_OEM_PARAM_TYPE_BW_CTL 1 #define I40E_AQ_OEM_PARAM_MAC 2 __le32 param_value1; - u8 param_value2[8]; + __le16 param_value2; + u8 reserved[6]; }; I40E_CHECK_CMD_LENGTH(i40e_aqc_oem_param_change); @@ -2087,6 +2214,28 @@ struct i40e_aqc_oem_state_change { I40E_CHECK_CMD_LENGTH(i40e_aqc_oem_state_change); +/* Initialize OCSD (0xFE02, direct) */ +struct i40e_aqc_opc_oem_ocsd_initialize { + u8 type_status; + u8 reserved1[3]; + __le32 ocsd_memory_block_addr_high; + __le32 ocsd_memory_block_addr_low; + __le32 requested_update_interval; +}; + +I40E_CHECK_CMD_LENGTH(i40e_aqc_opc_oem_ocsd_initialize); + +/* Initialize OCBB (0xFE03, direct) */ +struct i40e_aqc_opc_oem_ocbb_initialize { + u8 type_status; + u8 reserved1[3]; + __le32 ocbb_memory_block_addr_high; + __le32 ocbb_memory_block_addr_low; + u8 reserved2[4]; +}; + +I40E_CHECK_CMD_LENGTH(i40e_aqc_opc_oem_ocbb_initialize); + /* debug commands */ /* get device id (0xFF00) uses the generic structure */ Modified: projects/ifnet/sys/dev/ixl/i40e_common.c ============================================================================== --- projects/ifnet/sys/dev/ixl/i40e_common.c Mon Jan 12 22:27:38 2015 (r277093) +++ projects/ifnet/sys/dev/ixl/i40e_common.c Mon Jan 12 22:32:00 2015 (r277094) @@ -95,47 +95,51 @@ void i40e_debug_aq(struct i40e_hw *hw, e { struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc; u16 len = LE16_TO_CPU(aq_desc->datalen); - u8 *aq_buffer = (u8 *)buffer; - u32 data[4]; - u32 i = 0; + u8 *buf = (u8 *)buffer; + u16 i = 0; if ((!(mask & hw->debug_mask)) || (desc == NULL)) return; i40e_debug(hw, mask, "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n", - aq_desc->opcode, aq_desc->flags, aq_desc->datalen, - aq_desc->retval); + LE16_TO_CPU(aq_desc->opcode), + LE16_TO_CPU(aq_desc->flags), + LE16_TO_CPU(aq_desc->datalen), + LE16_TO_CPU(aq_desc->retval)); i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n", - aq_desc->cookie_high, aq_desc->cookie_low); + LE32_TO_CPU(aq_desc->cookie_high), + LE32_TO_CPU(aq_desc->cookie_low)); i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n", - aq_desc->params.internal.param0, - aq_desc->params.internal.param1); + LE32_TO_CPU(aq_desc->params.internal.param0), + LE32_TO_CPU(aq_desc->params.internal.param1)); i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n", - aq_desc->params.external.addr_high, - aq_desc->params.external.addr_low); + LE32_TO_CPU(aq_desc->params.external.addr_high), + LE32_TO_CPU(aq_desc->params.external.addr_low)); if ((buffer != NULL) && (aq_desc->datalen != 0)) { - i40e_memset(data, 0, sizeof(data), I40E_NONDMA_MEM); i40e_debug(hw, mask, "AQ CMD Buffer:\n"); if (buf_len < len) len = buf_len; - for (i = 0; i < len; i++) { - data[((i % 16) / 4)] |= - ((u32)aq_buffer[i]) << (8 * (i % 4)); - if ((i % 16) == 15) { - i40e_debug(hw, mask, - "\t0x%04X %08X %08X %08X %08X\n", - i - 15, data[0], data[1], data[2], - data[3]); - i40e_memset(data, 0, sizeof(data), - I40E_NONDMA_MEM); - } + /* write the full 16-byte chunks */ + for (i = 0; i < (len - 16); i += 16) + i40e_debug(hw, mask, + "\t0x%04X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", + i, buf[i], buf[i+1], buf[i+2], buf[i+3], + buf[i+4], buf[i+5], buf[i+6], buf[i+7], + buf[i+8], buf[i+9], buf[i+10], buf[i+11], + buf[i+12], buf[i+13], buf[i+14], buf[i+15]); + /* write whatever's left over without overrunning the buffer */ + if (i < len) { + char d_buf[80]; + int j = 0; + + memset(d_buf, 0, sizeof(d_buf)); + j += sprintf(d_buf, "\t0x%04X ", i); + while (i < len) + j += sprintf(&d_buf[j], " %02X", buf[i++]); + i40e_debug(hw, mask, "%s\n", d_buf); } - if ((i % 16) != 0) - i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n", - i - (i % 16), data[0], data[1], data[2], - data[3]); } } @@ -546,6 +550,30 @@ struct i40e_rx_ptype_decoded i40e_ptype_ /** + * i40e_validate_mac_addr - Validate unicast MAC address + * @mac_addr: pointer to MAC address + * + * Tests a MAC address to ensure it is a valid Individual Address + **/ +enum i40e_status_code i40e_validate_mac_addr(u8 *mac_addr) +{ + enum i40e_status_code status = I40E_SUCCESS; + + DEBUGFUNC("i40e_validate_mac_addr"); + + /* Broadcast addresses ARE multicast addresses + * Make sure it is not a multicast address + * Reject the zero address + */ + if (I40E_IS_MULTICAST(mac_addr) || + (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 && + mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0)) + status = I40E_ERR_INVALID_MAC_ADDR; + + return status; +} + +/** * i40e_init_shared_code - Initialize the shared code * @hw: pointer to hardware structure * @@ -560,7 +588,7 @@ struct i40e_rx_ptype_decoded i40e_ptype_ enum i40e_status_code i40e_init_shared_code(struct i40e_hw *hw) { enum i40e_status_code status = I40E_SUCCESS; - u32 reg; + u32 port, ari, func_rid; DEBUGFUNC("i40e_init_shared_code"); @@ -575,18 +603,17 @@ enum i40e_status_code i40e_init_shared_c hw->phy.get_link_info = TRUE; - /* Determine port number */ - reg = rd32(hw, I40E_PFGEN_PORTNUM); - reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >> - I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT); - hw->port = (u8)reg; - - /* Determine the PF number based on the PCI fn */ - reg = rd32(hw, I40E_GLPCI_CAPSUP); - if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK) - hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func); + /* Determine port number and PF number*/ + port = (rd32(hw, I40E_PFGEN_PORTNUM) & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) + >> I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT; + hw->port = (u8)port; + ari = (rd32(hw, I40E_GLPCI_CAPSUP) & I40E_GLPCI_CAPSUP_ARI_EN_MASK) >> + I40E_GLPCI_CAPSUP_ARI_EN_SHIFT; + func_rid = rd32(hw, I40E_PF_FUNC_RID); + if (ari) + hw->pf_id = (u8)(func_rid & 0xff); else - hw->pf_id = (u8)hw->bus.func; + hw->pf_id = (u8)(func_rid & 0x7); status = i40e_init_nvm(hw); return status; @@ -728,25 +755,60 @@ void i40e_pre_tx_queue_cfg(struct i40e_h } /** - * i40e_validate_mac_addr - Validate unicast MAC address - * @mac_addr: pointer to MAC address + * i40e_read_pba_string - Reads part number string from EEPROM + * @hw: pointer to hardware structure + * @pba_num: stores the part number string from the EEPROM + * @pba_num_size: part number string buffer length * - * Tests a MAC address to ensure it is a valid Individual Address + * Reads the part number string from the EEPROM. **/ -enum i40e_status_code i40e_validate_mac_addr(u8 *mac_addr) +enum i40e_status_code i40e_read_pba_string(struct i40e_hw *hw, u8 *pba_num, + u32 pba_num_size) { enum i40e_status_code status = I40E_SUCCESS; + u16 pba_word = 0; + u16 pba_size = 0; + u16 pba_ptr = 0; + u16 i = 0; + + status = i40e_read_nvm_word(hw, I40E_SR_PBA_FLAGS, &pba_word); + if ((status != I40E_SUCCESS) || (pba_word != 0xFAFA)) { + DEBUGOUT("Failed to read PBA flags or flag is invalid.\n"); + return status; + } - DEBUGFUNC("i40e_validate_mac_addr"); + status = i40e_read_nvm_word(hw, I40E_SR_PBA_BLOCK_PTR, &pba_ptr); + if (status != I40E_SUCCESS) { + DEBUGOUT("Failed to read PBA Block pointer.\n"); + return status; + } - /* Broadcast addresses ARE multicast addresses - * Make sure it is not a multicast address - * Reject the zero address + status = i40e_read_nvm_word(hw, pba_ptr, &pba_size); + if (status != I40E_SUCCESS) { + DEBUGOUT("Failed to read PBA Block size.\n"); + return status; + } + + /* Subtract one to get PBA word count (PBA Size word is included in + * total size) */ - if (I40E_IS_MULTICAST(mac_addr) || - (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 && - mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0)) - status = I40E_ERR_INVALID_MAC_ADDR; + pba_size--; + if (pba_num_size < (((u32)pba_size * 2) + 1)) { + DEBUGOUT("Buffer to small for PBA data.\n"); + return I40E_ERR_PARAM; + } + + for (i = 0; i < pba_size; i++) { + status = i40e_read_nvm_word(hw, (pba_ptr + 1) + i, &pba_word); + if (status != I40E_SUCCESS) { + DEBUGOUT1("Failed to read PBA Block word %d.\n", i); + return status; + } + + pba_num[(i * 2)] = (pba_word >> 8) & 0xFF; + pba_num[(i * 2) + 1] = pba_word & 0xFF; + } + pba_num[(pba_size * 2)] = '\0'; return status; } @@ -799,7 +861,7 @@ static enum i40e_media_type i40e_get_med return media; } -#define I40E_PF_RESET_WAIT_COUNT 100 +#define I40E_PF_RESET_WAIT_COUNT 110 /** * i40e_pf_reset - Reset the PF * @hw: pointer to the hardware structure @@ -818,8 +880,9 @@ enum i40e_status_code i40e_pf_reset(stru * The grst delay value is in 100ms units, and we'll wait a * couple counts longer to be sure we don't just miss the end. */ - grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK - >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT; + grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) & + I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >> + I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT; for (cnt = 0; cnt < grst_del + 2; cnt++) { reg = rd32(hw, I40E_GLGEN_RSTAT); if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK)) @@ -1010,8 +1073,11 @@ static u32 i40e_led_is_mine(struct i40e_ return gpio_val; } -#define I40E_LED0 22 +#define I40E_COMBINED_ACTIVITY 0xA +#define I40E_FILTER_ACTIVITY 0xE #define I40E_LINK_ACTIVITY 0xC +#define I40E_MAC_ACTIVITY 0xD +#define I40E_LED0 22 /** * i40e_led_get - return current on/off mode @@ -1024,6 +1090,7 @@ static u32 i40e_led_is_mine(struct i40e_ **/ u32 i40e_led_get(struct i40e_hw *hw) { + u32 current_mode = 0; u32 mode = 0; int i; @@ -1036,6 +1103,20 @@ u32 i40e_led_get(struct i40e_hw *hw) if (!gpio_val) continue; + /* ignore gpio LED src mode entries related to the activity + * LEDs + */ + current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) + >> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT); + switch (current_mode) { + case I40E_COMBINED_ACTIVITY: + case I40E_FILTER_ACTIVITY: + case I40E_MAC_ACTIVITY: + continue; + default: + break; + } + mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT; break; @@ -1055,6 +1136,7 @@ u32 i40e_led_get(struct i40e_hw *hw) **/ void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink) { + u32 current_mode = 0; int i; if (mode & 0xfffffff0) @@ -1069,6 +1151,20 @@ void i40e_led_set(struct i40e_hw *hw, u3 if (!gpio_val) continue; + /* ignore gpio LED src mode entries related to the activity + * LEDs + */ + current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) + >> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT); + switch (current_mode) { + case I40E_COMBINED_ACTIVITY: + case I40E_FILTER_ACTIVITY: + case I40E_MAC_ACTIVITY: + continue; + default: + break; + } + gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK; /* this & is a bit of paranoia, but serves as a range check */ *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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