Date: Fri, 7 Apr 2006 00:11:55 +0400 (MSD) From: Oleg Sharoiko <os@rsu.ru> To: John Baldwin <jhb@freebsd.org> Cc: freebsd-scsi@freebsd.org, Andrey Beresovsky <and@rsu.ru> Subject: Re: Boot hangs on ips0: resetting adapter, this may take up to 5 minutes Message-ID: <20060407000934.R17852@brain.cc.rsu.ru> In-Reply-To: <20060406223724.S1099@wolf.os.rsu.ru> References: <20060215102749.D58480@brain.cc.rsu.ru> <200603271607.09550.jhb@freebsd.org> <20060328185449.F763@brain.cc.rsu.ru> <200603281108.25548.jhb@freebsd.org> <20060328201134.S763@brain.cc.rsu.ru> <20060406223724.S1099@wolf.os.rsu.ru>
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On Thu, 6 Apr 2006, Oleg Sharoiko wrote: OS>It looks like the mis-routed interrupt is the one from ips. In my kernel OS>ips is on vector 49 and bge is on vector 60. I've added OS> if (vector == 60) OS> vector = 49; OS>to sys/amd64/amd64/local_apic.c and I have no more interrupt storm until I forgot to mention that I inserted this 'if' into lapic_handle_intr(). OS>bge really generates interrupt. Am I right with my conclusion about ips OS>interrupt being mis-directed to bge? OS> OS>There's also another interesting point: it looks like ips triggers OS>interrupt on both vectors (49 and 60 - irq 28 and irq 16). Why do I think OS>so? OS> OS>1. ips works fine even when there's no bge in kernel (I suppose irq 16 is OS>not activated in this case). I suppose this should mean that interrupts OS>are properly delivered to ips driver. OS> OS>2. I've added debug printf to bge_intr and in single mode when preemption OS>is disabled I see exact the same number of interrupts delivered to ips OS>(checked counters with showintrcnt) and to bge (incorrectly delivered - OS>bge is not in UP state and bge registers say "no interrupt"). OS> OS>This seems really strange to me, how can this be possible? Is there any OS>way to fix this? OS> OS>On Tue, 28 Mar 2006, Oleg Sharoiko wrote: OS> OS>OS> OS>OS>On Tue, 28 Mar 2006, John Baldwin wrote: OS>OS> OS>OS>JB>Is this an Intel box? OS>OS> OS>OS>This is IBM xSeries 226. Motherboard is labeled 'MS 9151 Ver.1'. It OS>OS>appears to be MSI E7525 Master-S2 or a modification of it. I couldn't find OS>OS>information about it in the net. Just few short notes and nothing else. I OS>OS>suppose it's based on Intel's E7525 chipset. OS>OS> OS>OS>JB>It only detects it if the interrupt line is constantly on. If the interrupt OS>OS>JB>line goes off for a little bit and then back on often enough the istorm logic OS>OS>JB>won't kick in. You can try lowering the threshold via the tunable to see if OS>OS>JB>you can get it to kick in perhaps. OS>OS> OS>OS>No luck here. OS>OS> OS>OS> OS> OS> -- Oleg Sharoiko. Software and Network Engineer Computer Center of Rostov State University.
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