Date: Wed, 11 Oct 2017 15:13:40 +0000 (UTC) From: Conrad Meyer <cem@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r324534 - head/sys/dev/hwpmc Message-ID: <201710111513.v9BFDepN036996@repo.freebsd.org>
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Author: cem Date: Wed Oct 11 15:13:40 2017 New Revision: 324534 URL: https://svnweb.freebsd.org/changeset/base/324534 Log: hwpmc(4): Actually use a sufficiently wide type jhibbits@ points out that left shifting bits 8-11 24 bits won't fit in a 32-bit integer either. Corrects r324533. Submitted by: jhibbits Sponsored by: Dell EMC Isilon Modified: head/sys/dev/hwpmc/hwpmc_amd.h Modified: head/sys/dev/hwpmc/hwpmc_amd.h ============================================================================== --- head/sys/dev/hwpmc/hwpmc_amd.h Wed Oct 11 14:59:04 2017 (r324533) +++ head/sys/dev/hwpmc/hwpmc_amd.h Wed Oct 11 15:13:40 2017 (r324534) @@ -67,7 +67,7 @@ #define AMD_PMC_EVENTMASK 0xF000000FF #define AMD_PMC_TO_UNITMASK(x) (((x) << 8) & AMD_PMC_UNITMASK) -#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((uint32_t)(x) & 0xF00) << 24)) +#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((uint64_t)(x) & 0xF00) << 24)) #define AMD_VALID_BITS (AMD_PMC_COUNTERMASK | AMD_PMC_INVERT | \ AMD_PMC_ENABLE | AMD_PMC_INT | AMD_PMC_PC | AMD_PMC_EDGE | \ AMD_PMC_OS | AMD_PMC_USR | AMD_PMC_UNITMASK | AMD_PMC_EVENTMASK)
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