From owner-freebsd-embedded@FreeBSD.ORG Thu Mar 13 16:58:29 2008 Return-Path: Delivered-To: freebsd-embedded@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B3878106566B for ; Thu, 13 Mar 2008 16:58:29 +0000 (UTC) (envelope-from xcllnt@mac.com) Received: from smtpoutm.mac.com (smtpoutm.mac.com [17.148.16.66]) by mx1.freebsd.org (Postfix) with ESMTP id 954938FC24 for ; Thu, 13 Mar 2008 16:58:29 +0000 (UTC) (envelope-from xcllnt@mac.com) Received: from mac.com (asmtp007-s [10.150.69.70]) by smtpoutm.mac.com (Xserve/smtpout003/MantshX 4.0) with ESMTP id m2DGwRuL016653; Thu, 13 Mar 2008 09:58:28 -0700 (PDT) Received: from macbook-pro.jnpr.net (natint3.juniper.net [66.129.224.36]) (authenticated bits=0) by mac.com (Xserve/asmtp007/MantshX 4.0) with ESMTP id m2DGwKCM026601 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NO); Thu, 13 Mar 2008 09:58:21 -0700 (PDT) Message-Id: <62FE92BB-0272-46A7-BDA9-5992FDE2F2D9@mac.com> From: Marcel Moolenaar To: Rafal Jaworowski In-Reply-To: <47D905E8.5020608@semihalf.com> Content-Type: text/plain; charset=US-ASCII; format=flowed; delsp=yes Content-Transfer-Encoding: 7bit Mime-Version: 1.0 (Apple Message framework v919.2) Date: Thu, 13 Mar 2008 09:58:20 -0700 References: <47D7FA35.30204@semihalf.com> <47D905E8.5020608@semihalf.com> X-Mailer: Apple Mail (2.919.2) Cc: freebsd-embedded@freebsd.org Subject: Re: Booting FreeBSD on MPC8540 eval board X-BeenThere: freebsd-embedded@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Dedicated and Embedded Systems List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Mar 2008 16:58:29 -0000 On Mar 13, 2008, at 3:46 AM, Rafal Jaworowski wrote: >> Here is some output obtained from uboot : >> >> MPC8540EVAL=> mii device >> MII devices: 'TSEC0' 'TSEC1' 'FEC' >> Current device: 'TSEC0' >> MPC8540EVAL=> mii info >> PHY 0x02: OUI = 0x04DE, Model = 0x0E, Rev = 0x02, 10baseT, HDX >> PHY 0x04: OUI = 0x5043, Model = 0x06, Rev = 0x02, 100baseT, FDX >> PHY 0x07: OUI = 0x5043, Model = 0x06, Rev = 0x02, 10baseT, HDX >> PHY 0x1F: OUI = 0x0000, Model = 0x00, Rev = 0x00, 10baseT, HDX >> MPC8540EVAL=> >> PHY 0x02: OUI = 0x04DE, Model = 0x0E, Rev = 0x02, 10baseT, HDX >> PHY 0x04: OUI = 0x5043, Model = 0x06, Rev = 0x02, 100baseT, FDX >> PHY 0x07: OUI = 0x5043, Model = 0x06, Rev = 0x02, 10baseT, HDX >> PHY 0x1F: OUI = 0x0000, Model = 0x00, Rev = 0x00, 10baseT, HDX >> >> Do I need some additional mods in the miibus code that is not in CVS? >> > > I don't think so, just having miibus should suffice. The problem > you're having > is likely caused by a different MAC-PHY topology than is for CDS > boards the > port was mainly tested on. > > The hidden assumption we currently have requires a 1:1 mapping > between TSEC > units and PHY numbers they are 'routed' to. We don't deal too well > with > other/mixed MAC-PHY topologies that various systems can have. We fixed this at Juniper. If you're done with TSEC for now, I can backport the changes... -- Marcel Moolenaar xcllnt@mac.com