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From: Adrian Chadd <adrian@FreeBSD.org>
Date: Thu, 28 Apr 2011 11:13:26 +0000 (UTC)
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Subject: svn commit: r221160 - head/sys/mips/atheros
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Author: adrian
Date: Thu Apr 28 11:13:26 2011
New Revision: 221160
URL: http://svn.freebsd.org/changeset/base/221160

Log:
  Add the IP2 DDR flush handlers.
  
  These aren't yet used in the interrupt handler path but should be.

Modified:
  head/sys/mips/atheros/ar724x_chip.c
  head/sys/mips/atheros/ar724xreg.h
  head/sys/mips/atheros/ar91xx_chip.c

Modified: head/sys/mips/atheros/ar724x_chip.c
==============================================================================
--- head/sys/mips/atheros/ar724x_chip.c	Thu Apr 28 11:06:14 2011	(r221159)
+++ head/sys/mips/atheros/ar724x_chip.c	Thu Apr 28 11:13:26 2011	(r221160)
@@ -146,6 +146,13 @@ ar724x_chip_ddr_flush_ge1(void)
 	ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
 }
 
+static void
+ar724x_chip_ddr_flush_ip2(void)
+{
+	ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE);
+}
+
+
 static uint32_t
 ar724x_chip_get_eth_pll(unsigned int mac, int speed)
 {
@@ -207,6 +214,6 @@ struct ar71xx_cpu_def ar724x_chip_def = 
         &ar724x_chip_ddr_flush_ge0,
         &ar724x_chip_ddr_flush_ge1,
         &ar724x_chip_get_eth_pll,
-	NULL,		/* ar71xx_chip_irq_flush_ip2 */
+        &ar724x_chip_ddr_flush_ip2,
 	&ar724x_chip_init_usb_peripheral
 };

Modified: head/sys/mips/atheros/ar724xreg.h
==============================================================================
--- head/sys/mips/atheros/ar724xreg.h	Thu Apr 28 11:06:14 2011	(r221159)
+++ head/sys/mips/atheros/ar724xreg.h	Thu Apr 28 11:13:26 2011	(r221160)
@@ -59,6 +59,7 @@
 #define	AR7240_OHCI_BASE		0x1b000000
 #define	AR7240_OHCI_SIZE		0x01000000
 #define	AR724X_DDR_REG_FLUSH_USB	(AR71XX_DDR_CONFIG + 0x84)
+#define	AR724X_DDR_REG_FLUSH_PCIE	(AR71XX_DDR_CONFIG + 0x88)
 
 #define	AR724X_PCI_CRP_BASE		(AR71XX_APB_BASE + 0x000C0000)
 #define	AR724X_PCI_CRP_SIZE		0x100

Modified: head/sys/mips/atheros/ar91xx_chip.c
==============================================================================
--- head/sys/mips/atheros/ar91xx_chip.c	Thu Apr 28 11:06:14 2011	(r221159)
+++ head/sys/mips/atheros/ar91xx_chip.c	Thu Apr 28 11:13:26 2011	(r221160)
@@ -174,6 +174,13 @@ ar91xx_chip_ddr_flush_ge1(void)
 	ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
 }
 
+static void
+ar91xx_chip_ddr_flush_ip2(void)
+{
+	ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC);
+}
+
+
 static uint32_t
 ar91xx_chip_get_eth_pll(unsigned int mac, int speed)
 {
@@ -211,6 +218,6 @@ struct ar71xx_cpu_def ar91xx_chip_def = 
         &ar91xx_chip_ddr_flush_ge0,
         &ar91xx_chip_ddr_flush_ge1,
         &ar91xx_chip_get_eth_pll,
-	NULL,
+        &ar91xx_chip_ddr_flush_ip2,
 	&ar91xx_chip_init_usb_peripheral,
 };