Date: Thu, 2 May 2002 19:08:28 -0700 From: Jonathan Mini <mini@FreeBSD.org> To: Terry Lambert <tlambert2@mindspring.com> Cc: John Baldwin <jhb@FreeBSD.org>, freebsd-smp@FreeBSD.org, Andrew Gallatin <gallatin@cs.duke.edu> Subject: Re: hlt when idle? Message-ID: <20020502190828.D56560@stylus.haikugeek.com> In-Reply-To: <3CD170D4.48AEB353@mindspring.com>; from tlambert2@mindspring.com on Thu, May 02, 2002 at 10:01:08AM -0700 References: <20020501151123.G30080@stylus.haikugeek.com> <XFMail.20020502101631.jhb@FreeBSD.org> <20020502072949.C56560@stylus.haikugeek.com> <3CD170D4.48AEB353@mindspring.com>
next in thread | previous in thread | raw e-mail | index | archive | help
Terry Lambert [tlambert2@mindspring.com] wrote : > Jonathan Mini wrote: > > Maybe it was Sun? > > You are an ex-Be-geek. Maybe it was the BeBox and the two > processor PPC603e box from Apple? That crossed my mind first, but Be wired all of the interrupts to CPU 0 all the time, including the clock interrupt. It uses IPIs to let the other processors know of events like VM modifications and scheduling excess. > >From memory, in addition to using MEI instead of MESI cache > coherency because the CPUs were not built for SMP (the MEI > arbitration was done by putting contention hardware in place > of the L2 cache), interrupt routing was hardware round-robin. > > 8-). That is more detail than I know about the PPC-based BeBox. By the time I joined Be, we had already officially dropped support for them and were an x86 shop. -- Jonathan Mini <mini@freebsd.org> http://www.haikugeek.com "He who is not aware of his ignorance will be only misled by his knowledge." -- Richard Whatley To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?20020502190828.D56560>