From owner-freebsd-hackers Sat Nov 1 00:18:15 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.7/8.8.7) id AAA07525 for hackers-outgoing; Sat, 1 Nov 1997 00:18:15 -0800 (PST) (envelope-from owner-freebsd-hackers) Received: from Campino.Informatik.RWTH-Aachen.DE (campino.Informatik.RWTH-Aachen.DE [137.226.116.240]) by hub.freebsd.org (8.8.7/8.8.7) with ESMTP id AAA07513 for ; Sat, 1 Nov 1997 00:18:10 -0800 (PST) (envelope-from kuku@gilberto.physik.RWTH-Aachen.DE) Received: from gil.physik.rwth-aachen.de (gilberto.physik.rwth-aachen.de [137.226.30.2]) by Campino.Informatik.RWTH-Aachen.DE (8.8.7/RBI-Z14) with ESMTP id JAA08407; Sat, 1 Nov 1997 09:18:00 +0100 (MET) Received: (from kuku@localhost) by gil.physik.rwth-aachen.de (8.8.5/8.6.9) id JAA00703; Sat, 1 Nov 1997 09:32:15 +0100 (MET) Message-ID: <19971101093215.27334@gil.physik.rwth-aachen.de> Date: Sat, 1 Nov 1997 09:32:15 +0100 From: Christoph Kukulies To: dg@root.com Cc: "Guillermo A. Loyola" , Christoph Kukulies , freebsd-hackers@freefall.FreeBSD.org Subject: Re: mmap/mlock problem References: <3455B267.FBC7DD67@epigram.com> <199710281036.CAA12019@implode.root.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Mailer: Mutt 0.81e In-Reply-To: <199710281036.CAA12019@implode.root.com>; from David Greenman on Tue, Oct 28, 1997 at 02:36:27AM -0800 Sender: owner-freebsd-hackers@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk On Tue, Oct 28, 1997 at 02:36:27AM -0800, David Greenman wrote: > >Worse yet, the interface for drivers to do it pmap_mapdev() > >claims to make the mapping non-cached in the comment, but the code > >does not seem to be doing it. The non-cached bits are defined in > >pmap.h: > > > >i386/include/pmap.h:75:#define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */ > > > >but are only used in machdep.c when probing memory. > > > >Questions for FreeBSD hackers: > > > >1) Shouldn't the line that sets the ptes in pmap_mapdev read: > > *pte = pa | PG_RW | PG_N | PG_V; > > > > instead of > > *pte = pa | PG_RW | PG_V; > > ? > > > >2) WOuld it be reasonalbe to add a new flag to mmap to allow > > specification of uncached mappings? > > The code used to set the no-cache flags, but I changed it to do a normal > mapping after seeing relibility problems with certain memory mapped devices (I > suspect this was caused by PWT rather than PCD). The cachability is normally > determined by chipset settings and the page table flags are not needed to > disable it for non-RAM areas of the address space. When my BIOS doesn't have settings to make ISA memory regions unchacheable (I assume it's not the 'shadow ram' section of the chipset setup), can I be sure that the chipset does that for me? Or would adding the PG_N flag to the device mapping code assure this. I would not mind adding this in my special case if only I could get the memory region behave like it does under DOS. > > -DG > > David Greenman > Core-team/Principal Architect, The FreeBSD Project -- Chris Christoph P. U. Kukulies kuku@gil.physik.rwth-aachen.de