Date: Wed, 6 Sep 2000 23:15:21 +1100 (EST) From: Bruce Evans <bde@zeta.org.au> To: Kenjiro Cho <kjc@csl.sony.co.jp> Cc: freebsd-net@FreeBSD.ORG Subject: Re: rdtsc overhead (was Re: Running ALTQ) Message-ID: <Pine.BSF.4.21.0009062310410.26066-100000@besplex.bde.org> In-Reply-To: <20000906165112Y.kjc@csl.sony.co.jp>
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On Wed, 6 Sep 2000, Kenjiro Cho wrote:
>
> Bruce Evans wrote:
> > main()
> > {
> > __asm("
> > movl $100000000,%ecx
> > .align 4,0x90
> > 1:
> > rdtsc
> > decl %ecx
> > nop
> > jne 1b
> > ");
> > }
> >
> > and it took 30 cycles on a Celeron and 12 cycles on a P5 (32 and 14
> > cycles, respectively, including 2 cycles of loop overhead).
>
> Hmmm, I've confirmed the result. If another rdtsc is inserted in the
> loop, it almost doubles the execution time, which suggests the loop
> overhead is negligible.
>
> But 30 cycles sound a bit too long. As I understand it, rdtsc is not
> a serializing instruction. Is it more than latching the counter plus
> reading the 64bit value into 2 32bit registers?
I don't know exactly what it does. Apperently the latch operation is slow.
12 cycles was on a P5/133 and 30 cycles was on a Celeron 366 overclocked
to 522.
Bruce
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