From owner-freebsd-current@FreeBSD.ORG Mon Jul 31 18:02:01 2006 Return-Path: X-Original-To: freebsd-current@freebsd.org Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id AD8AB16A4DE for ; Mon, 31 Jul 2006 18:02:01 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from server.baldwin.cx (66-23-211-162.clients.speedfactory.net [66.23.211.162]) by mx1.FreeBSD.org (Postfix) with ESMTP id B553B43D5A for ; Mon, 31 Jul 2006 18:01:55 +0000 (GMT) (envelope-from jhb@freebsd.org) Received: from localhost.corp.yahoo.com (john@localhost [127.0.0.1]) (authenticated bits=0) by server.baldwin.cx (8.13.4/8.13.4) with ESMTP id k6VI1o3L072680; Mon, 31 Jul 2006 14:01:50 -0400 (EDT) (envelope-from jhb@freebsd.org) From: John Baldwin To: freebsd-current@freebsd.org Date: Mon, 31 Jul 2006 13:05:37 -0400 User-Agent: KMail/1.9.1 References: <200607251254.k6PCsBef092737@lurza.secnetix.de> <20060729230214.GI12597@groat.ugcs.caltech.edu> <1154216319.23616.23.camel@genius.i.cz> In-Reply-To: <1154216319.23616.23.camel@genius.i.cz> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200607311305.38398.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH authentication, not delayed by milter-greylist-2.0.2 (server.baldwin.cx [127.0.0.1]); Mon, 31 Jul 2006 14:01:54 -0400 (EDT) X-Virus-Scanned: ClamAV 0.87.1/1627/Sun Jul 30 19:34:54 2006 on server.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=4.2 tests=ALL_TRUSTED,AWL,BAYES_00 autolearn=ham version=3.1.0 X-Spam-Checker-Version: SpamAssassin 3.1.0 (2005-09-13) on server.baldwin.cx Cc: Paul Allen , Michal Mertl , Brian Candler , Peter Jeremy Subject: Re: vmstat's entries type X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 31 Jul 2006 18:02:01 -0000 On Saturday 29 July 2006 19:38, Michal Mertl wrote: > Paul Allen wrote: > > Surely all you need to do is a cheap crit_enter,crit_exit > > while updating the 64-bit per cpu counters. and on > > a 64-bit arch you skip the crit_enter,crit_exit. > > Critical_enter/exit seem to be quite lightweight (single > read/modify/write of a variable). > > > Seriously this is a bike shed. We can summarize it thus: > > statistics should be maintained in 64-bit counters, these > > counters should be per-cpu and consistent in that context, > > nothing else should appear on the critical path. > > Why do you call it a bikesched? I think that your proposal could work > but as nobody proposed doing the stuff with critical_* before, the > thread may be fruitful. > > Is critical_* good enough protection though? What if two threads were > updating the same per-CPU counter on the same CPU at the same time? With > 64bits counter on a 32bit architecture? I expect the cache coherency > issues are completely eliminated with per-CPU data, aren't they? critical_* would prevent an interrupt from preempting the thread, so you wouldn't have this case. That said, I think just using a simple algo (like inc; jnc 1b; inc; 1:) would be fine. With the counter being per-cpu you don't even need the 'lock' prefix for i386. You would have to find similar solutions for other 32-bit archs (arm, ppc, mips). -- John Baldwin