From owner-p4-projects@FreeBSD.ORG Sun May 8 19:55:12 2005 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id AF88B16A4E8; Sun, 8 May 2005 19:55:11 +0000 (GMT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 81A2E16A4E6 for ; Sun, 8 May 2005 19:55:11 +0000 (GMT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6951043D9D for ; Sun, 8 May 2005 19:55:11 +0000 (GMT) (envelope-from marcel@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.1/8.13.1) with ESMTP id j48JtBoe092539 for ; Sun, 8 May 2005 19:55:11 GMT (envelope-from marcel@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.1/8.13.1/Submit) id j48JtBfi092536 for perforce@freebsd.org; Sun, 8 May 2005 19:55:11 GMT (envelope-from marcel@freebsd.org) Date: Sun, 8 May 2005 19:55:11 GMT Message-Id: <200505081955.j48JtBfi092536@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to marcel@freebsd.org using -f From: Marcel Moolenaar To: Perforce Change Reviews Subject: PERFORCE change 76704 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 08 May 2005 19:55:12 -0000 http://perforce.freebsd.org/chv.cgi?CH=76704 Change 76704 by marcel@marcel_nfs on 2005/05/08 19:54:21 Wordsmithing after proofreading. Add a reference to R.F. Ferraro's "Programmer's guide to the galaxy^WEGA, VGA, and Super VGA cards". Affected files ... .. //depot/projects/tty/sys/dev/ic/vga.h#3 edit Differences ... ==== //depot/projects/tty/sys/dev/ic/vga.h#3 (text+ko) ==== @@ -31,15 +31,20 @@ /* * The VGA adapter uses two I/O port blocks. One of these blocks, the CRT - * controller registers can be located either at 0x3B0 or at 0x3D0 in I/O + * controller registers, can be located either at 0x3B0 or at 0x3D0 in I/O * port space. This allows compatibility with the monochrome adapter, which - * as the CRT controller at 0x3B0. + * has the CRT controller registers at 0x3B0. * * It is assumed that compatibility with the monochrome adapter is not of - * interest anymore. As such, the CRT controller is located at 0x3D0 in I/O - * port space. This means that the 2 I/O blocks are adjacent in I/O port - * space and can therefore be treated as a single logical I/O port block. - * This simplifies matters. + * interest anymore. As such, the CRT controller can be located at 0x3D0 in + * I/O port space unconditionally. This means that the 2 I/O blocks are + * always adjacent and can therefore be treated as a single logical I/O port + * range. In practical terms: there only has to be a single tag and handle + * to access all registers. + * + * The following definitions are taken from or inspired by: + * Programmer's Guide to the EGA, VGA, and Super VGA Cards -- 3rd ed., + * Richard F. Ferraro, Addison-Wesley, ISBN 0-201-62490-7 */ #define VGA_MEM_BASE 0xA0000