Date: Mon, 20 Mar 2023 20:47:53 GMT From: =?utf-8?Q?Jean-S=C3=A9bastien=20P=C3=A9dron?= <dumbbell@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: d780c6a6abb5 - main - x86/pci_early_quirks: Support Intel 11th+ gen Message-ID: <202303202047.32KKlrbx083372@gitrepo.freebsd.org>
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The branch main has been updated by dumbbell: URL: https://cgit.FreeBSD.org/src/commit/?id=d780c6a6abb5275c8c7219539553d51ac94a023e commit d780c6a6abb5275c8c7219539553d51ac94a023e Author: Jean-Sébastien Pédron <dumbbell@FreeBSD.org> AuthorDate: 2023-03-13 14:28:22 +0000 Commit: Jean-Sébastien Pédron <dumbbell@FreeBSD.org> CommitDate: 2023-03-20 20:47:36 +0000 x86/pci_early_quirks: Support Intel 11th+ gen Newer Intel CPUs/iGPUs use a new method to determine the base address of the stolen memory. This code was ported from Linux. Reviewed by: manu Approved by: manu Differential Revision: https://reviews.freebsd.org/D39057 --- sys/x86/pci/pci_early_quirks.c | 26 ++++++++++++ sys/x86/pci/pci_early_quirks.h | 95 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/sys/x86/pci/pci_early_quirks.c b/sys/x86/pci/pci_early_quirks.c index 29788cdd19d4..b9de1d78e022 100644 --- a/sys/x86/pci/pci_early_quirks.c +++ b/sys/x86/pci/pci_early_quirks.c @@ -71,6 +71,19 @@ intel_stolen_base_gen3(int bus, int slot, int func) return (val); } +static vm_paddr_t +intel_stolen_base_gen11(int bus, int slot, int func) +{ + uint32_t ctrl; + vm_paddr_t val; + + ctrl = pci_cfgregread(bus, slot, func, INTEL_GEN11_BSM_DW0, 4); + val = ctrl & INTEL_BSM_MASK; + val |= (uint64_t)pci_cfgregread( + bus, slot, func, INTEL_GEN11_BSM_DW1, 4) << 32; + return (val); +} + static vm_paddr_t intel_stolen_size_gen3(int bus, int slot, int func) { @@ -201,6 +214,11 @@ static const struct intel_stolen_ops intel_stolen_ops_chv = { .size = intel_stolen_size_chv, }; +static const struct intel_stolen_ops intel_stolen_ops_gen11 = { + .base = intel_stolen_base_gen11, + .size = intel_stolen_size_gen9, +}; + static const struct pci_device_id intel_ids[] = { INTEL_I915G_IDS(&intel_stolen_ops_gen3), INTEL_I915GM_IDS(&intel_stolen_ops_gen3), @@ -228,6 +246,14 @@ static const struct pci_device_id intel_ids[] = { INTEL_CFL_IDS(&intel_stolen_ops_gen9), INTEL_GLK_IDS(&intel_stolen_ops_gen9), INTEL_CNL_IDS(&intel_stolen_ops_gen9), + INTEL_ICL_11_IDS(&intel_stolen_ops_gen11), + INTEL_EHL_IDS(&intel_stolen_ops_gen11), + INTEL_JSL_IDS(&intel_stolen_ops_gen11), + INTEL_TGL_12_IDS(&intel_stolen_ops_gen11), + INTEL_RKL_IDS(&intel_stolen_ops_gen11), + INTEL_ADLS_IDS(&intel_stolen_ops_gen11), + INTEL_ADLP_IDS(&intel_stolen_ops_gen11), + INTEL_RPLS_IDS(&intel_stolen_ops_gen11), }; /* diff --git a/sys/x86/pci/pci_early_quirks.h b/sys/x86/pci/pci_early_quirks.h index fcb8e3ab1f1e..5267a5b3e303 100644 --- a/sys/x86/pci/pci_early_quirks.h +++ b/sys/x86/pci/pci_early_quirks.h @@ -39,6 +39,8 @@ #define PCI_CLASS_VGA 0x0300 #define INTEL_BSM 0x5c +#define INTEL_GEN11_BSM_DW0 0xc0 +#define INTEL_GEN11_BSM_DW1 0xc4 #define INTEL_BSM_MASK (-(1u << 20)) #define INTEL_GMCH_CTRL 0x52 @@ -477,4 +479,97 @@ INTEL_VGA_DEVICE(0x8A71, info), \ INTEL_VGA_DEVICE(0x8A70, info) +/* EHL */ +#define INTEL_EHL_IDS(info) \ + INTEL_VGA_DEVICE(0x4541, info), \ + INTEL_VGA_DEVICE(0x4551, info), \ + INTEL_VGA_DEVICE(0x4555, info), \ + INTEL_VGA_DEVICE(0x4557, info), \ + INTEL_VGA_DEVICE(0x4571, info) + +/* JSL */ +#define INTEL_JSL_IDS(info) \ + INTEL_VGA_DEVICE(0x4E51, info), \ + INTEL_VGA_DEVICE(0x4E55, info), \ + INTEL_VGA_DEVICE(0x4E57, info), \ + INTEL_VGA_DEVICE(0x4E61, info), \ + INTEL_VGA_DEVICE(0x4E71, info) + +/* TGL */ +#define INTEL_TGL_12_GT1_IDS(info) \ + INTEL_VGA_DEVICE(0x9A60, info), \ + INTEL_VGA_DEVICE(0x9A68, info), \ + INTEL_VGA_DEVICE(0x9A70, info) + +#define INTEL_TGL_12_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x9A40, info), \ + INTEL_VGA_DEVICE(0x9A49, info), \ + INTEL_VGA_DEVICE(0x9A59, info), \ + INTEL_VGA_DEVICE(0x9A78, info), \ + INTEL_VGA_DEVICE(0x9AC0, info), \ + INTEL_VGA_DEVICE(0x9AC9, info), \ + INTEL_VGA_DEVICE(0x9AD9, info), \ + INTEL_VGA_DEVICE(0x9AF8, info) + +#define INTEL_TGL_12_IDS(info) \ + INTEL_TGL_12_GT1_IDS(info), \ + INTEL_TGL_12_GT2_IDS(info) + +/* RKL */ +#define INTEL_RKL_IDS(info) \ + INTEL_VGA_DEVICE(0x4C80, info), \ + INTEL_VGA_DEVICE(0x4C8A, info), \ + INTEL_VGA_DEVICE(0x4C8B, info), \ + INTEL_VGA_DEVICE(0x4C8C, info), \ + INTEL_VGA_DEVICE(0x4C90, info), \ + INTEL_VGA_DEVICE(0x4C9A, info) + +/* DG1 */ +#define INTEL_DG1_IDS(info) \ + INTEL_VGA_DEVICE(0x4905, info), \ + INTEL_VGA_DEVICE(0x4906, info), \ + INTEL_VGA_DEVICE(0x4907, info), \ + INTEL_VGA_DEVICE(0x4908, info), \ + INTEL_VGA_DEVICE(0x4909, info) + +/* ADL-S */ +#define INTEL_ADLS_IDS(info) \ + INTEL_VGA_DEVICE(0x4680, info), \ + INTEL_VGA_DEVICE(0x4682, info), \ + INTEL_VGA_DEVICE(0x4688, info), \ + INTEL_VGA_DEVICE(0x468A, info), \ + INTEL_VGA_DEVICE(0x4690, info), \ + INTEL_VGA_DEVICE(0x4692, info), \ + INTEL_VGA_DEVICE(0x4693, info) + +/* ADL-P */ +#define INTEL_ADLP_IDS(info) \ + INTEL_VGA_DEVICE(0x46A0, info), \ + INTEL_VGA_DEVICE(0x46A1, info), \ + INTEL_VGA_DEVICE(0x46A2, info), \ + INTEL_VGA_DEVICE(0x46A3, info), \ + INTEL_VGA_DEVICE(0x46A6, info), \ + INTEL_VGA_DEVICE(0x46A8, info), \ + INTEL_VGA_DEVICE(0x46AA, info), \ + INTEL_VGA_DEVICE(0x462A, info), \ + INTEL_VGA_DEVICE(0x4626, info), \ + INTEL_VGA_DEVICE(0x4628, info), \ + INTEL_VGA_DEVICE(0x46B0, info), \ + INTEL_VGA_DEVICE(0x46B1, info), \ + INTEL_VGA_DEVICE(0x46B2, info), \ + INTEL_VGA_DEVICE(0x46B3, info), \ + INTEL_VGA_DEVICE(0x46C0, info), \ + INTEL_VGA_DEVICE(0x46C1, info), \ + INTEL_VGA_DEVICE(0x46C2, info), \ + INTEL_VGA_DEVICE(0x46C3, info) + +/* RPL-S */ +#define INTEL_RPLS_IDS(info) \ + INTEL_VGA_DEVICE(0xA780, info), \ + INTEL_VGA_DEVICE(0xA781, info), \ + INTEL_VGA_DEVICE(0xA782, info), \ + INTEL_VGA_DEVICE(0xA783, info), \ + INTEL_VGA_DEVICE(0xA788, info), \ + INTEL_VGA_DEVICE(0xA789, info) + #endif /* _PCI_EARLY_QUIRKS_H_ */
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