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From: Juli Mallett <jmallett@FreeBSD.org>
To: Perforce Change Reviews <perforce@freebsd.org>
Subject: PERFORCE change 48879 for review
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http://perforce.freebsd.org/chv.cgi?CH=48879

Change 48879 by jmallett@jmallett_oingo on 2004/03/13 00:43:45

	Attempt to handle interrupts and do some fun with clock ticks.

Affected files ...

.. //depot/projects/mips/sys/mips/sgimips/machdep_sgimips.c#27 edit

Differences ...

==== //depot/projects/mips/sys/mips/sgimips/machdep_sgimips.c#27 (text+ko) ====

@@ -33,8 +33,11 @@
 #include <vm/vm.h>
 #include <vm/vm_page.h>
 
+#include <machine/cpu.h>
 #include <machine/cpufunc.h>
+#include <machine/cpuinfo.h>
 #include <machine/cpuregs.h>
+#include <machine/frame.h>
 #include <machine/hwfunc.h>
 #include <machine/md_var.h>
 #include <machine/pmap.h>
@@ -93,7 +96,7 @@
 	arcs_attach((void *)MIPS_PHYS_TO_KSEG1(0x00001000));
 	arcs_cnattach();
 
-	bootverbose = 1; /* XXX */
+	bootverbose = 1;
 
 	cpufreq = ARCS_GetEnvironmentVariable("cpufreq");
 	if (cpufreq == NULL)
@@ -145,7 +148,7 @@
 			 * kernel memory.
 			 */
 			if (j > 0 && phys_avail[j - 1] >= kend)
-				kend = MIPS_PHYS_TO_KSEG0(last);
+				kend = MIPS_PHYS_TO_KSEG1(last);
 			lpmem += btoc(size);
 			break;
 		case ARCS_Mem_Type_FreeContiguous:
@@ -181,16 +184,38 @@
 	       ctob(availmem) / (1024 * 1024));
 }
 
-#if notyet
 void
-cpu_intr(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
+platform_intr(struct trapframe *tf)
 {
-	if (ipending & MIPS_HARD_INT_MASK)
-		(*platform.iointr)(status, cause, pc, ipending);
-	else
-		panic("Soft interrupt!?\n");
+	static u_register_t next, last;
+	register_t cause;
+
+	cause = mips_rd_cause();
+
+	if (cause & MIPS_INT_MASK_5) {
+		struct clockframe cf;
+		u_register_t now;
+
+		/*
+		 * Set next clock edge.
+		 */
+		if (next == 0)
+			next = mips_rd_count();
+		last = next;
+		next += curcpu()->ci_cycles_per_hz;
+		now = mips_rd_count();
+		if (last < next) {
+			while (now > next)
+				next += curcpu()->ci_cycles_per_hz;
+		}
+		mips_wr_compare(next);
+		cf.sr = tf->tf_regs[TF_SR];
+		cf.pc = tf->tf_regs[TF_EPC];
+		hardclock(&cf);
+	} else {
+		printf("stray intr cause %lx\n", cause);
+	}
 }
-#endif
 
 void
 platform_configure(void)