Date: Sun, 25 Apr 2004 19:27:52 -0700 (PDT) From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 51741 for review Message-ID: <200404260227.i3Q2RqD6040093@repoman.freebsd.org>
next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=51741 Change 51741 by marcel@marcel_nfs on 2004/04/25 19:27:15 Implement breakpoints and single stepping in DDB. Affected files ... .. //depot/projects/gdb/sys/ia64/ia64/db_interface.c#6 edit .. //depot/projects/gdb/sys/ia64/include/db_machdep.h#3 edit .. //depot/projects/gdb/sys/ia64/include/kdb.h#3 edit Differences ... ==== //depot/projects/gdb/sys/ia64/ia64/db_interface.c#6 (text+ko) ==== @@ -1,5 +1,3 @@ -/* $FreeBSD: src/sys/ia64/ia64/db_interface.c,v 1.24 2003/10/24 06:42:03 marcel Exp $ */ - /* * Mach Operating System * Copyright (c) 1992,1991,1990 Carnegie Mellon University @@ -28,13 +26,8 @@ * db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU) */ -/* - * Parts of this file are derived from Mach 3: - * - * File: alpha_instruction.c - * Author: Alessandro Forin, Carnegie Mellon University - * Date: 6/92 - */ +#include <sys/cdefs.h> +__FBSDID("$FreeBSD: src/sys/ia64/ia64/db_interface.c,v 1.24 2003/10/24 06:42:03 marcel Exp $"); /* * Interface to DDB. @@ -61,6 +54,13 @@ #include <ia64/disasm/disasm.h> +#define TMPL_BITS 5 +#define TMPL_MASK ((1 << TMPL_BITS) - 1) +#define SLOT_BITS 41 +#define SLOT_COUNT 3 +#define SLOT_MASK ((1ULL << SLOT_BITS) - 1ULL) +#define SLOT_SHIFT(i) (TMPL_BITS+((i)<<3)+(i)) + static jmp_buf *db_nofault = 0; extern jmp_buf db_jmpbuf; @@ -326,17 +326,45 @@ } void -db_write_breakpoint(vm_offset_t addr, u_int64_t *storage) +db_bkpt_write(db_addr_t addr, BKPT_INST_TYPE *storage) { + BKPT_INST_TYPE tmp; + db_addr_t loc; + int slot; + + slot = addr & 0xfUL; + if (slot >= SLOT_COUNT) + return; + loc = (addr & ~0xfUL) + (slot << 2); + + db_read_bytes(loc, sizeof(BKPT_INST_TYPE), (char *)&tmp); + *storage = (tmp >> SLOT_SHIFT(slot)) & SLOT_MASK; + + tmp &= ~(SLOT_MASK << SLOT_SHIFT(slot)); + tmp |= (0x84000 << 6) << SLOT_SHIFT(slot); + db_write_bytes(loc, sizeof(BKPT_INST_TYPE), (char *)&tmp); } void -db_clear_breakpoint(vm_offset_t addr, u_int64_t *storage) +db_bkpt_clear(db_addr_t addr, BKPT_INST_TYPE *storage) { + BKPT_INST_TYPE tmp; + db_addr_t loc; + int slot; + + slot = addr & 0xfUL; + if (slot >= SLOT_COUNT) + return; + loc = (addr & ~0xfUL) + (slot << 2); + + db_read_bytes(loc, sizeof(BKPT_INST_TYPE), (char *)&tmp); + tmp &= ~(SLOT_MASK << SLOT_SHIFT(slot)); + tmp |= *storage << SLOT_SHIFT(slot); + db_write_bytes(loc, sizeof(BKPT_INST_TYPE), (char *)&tmp); } void -db_skip_breakpoint() +db_bkpt_skip(void) { ddb_regs.tf_special.psr += IA64_PSR_RI_1; ==== //depot/projects/gdb/sys/ia64/include/db_machdep.h#3 (text+ko) ==== @@ -40,27 +40,27 @@ #include <machine/frame.h> #include <machine/ia64_cpu.h> -#define DB_NO_AOUT - -struct ia64_bundle; - typedef vm_offset_t db_addr_t; /* address - unsigned */ typedef long db_expr_t; /* expression - signed */ typedef struct trapframe db_regs_t; + extern db_regs_t ddb_regs; /* register state */ #define DDB_REGS (&ddb_regs) #define PC_REGS(regs) ((db_addr_t)(regs)->tf_special.iip + \ (((regs)->tf_special.psr >> 41) & 3)) -#define BKPT_WRITE(addr, storage) db_write_breakpoint(addr, storage) -#define BKPT_CLEAR(addr, storage) db_clear_breakpoint(addr, storage) -#define BKPT_INST_TYPE u_int64_t +#define BKPT_WRITE(addr, storage) db_bkpt_write(addr, storage) +#define BKPT_CLEAR(addr, storage) db_bkpt_clear(addr, storage) +#define BKPT_SKIP db_bkpt_skip() +#define BKPT_INST_TYPE uint64_t -#define BKPT_SKIP db_skip_breakpoint() +void db_bkpt_write(db_addr_t, BKPT_INST_TYPE *storage); +void db_bkpt_clear(db_addr_t, uint64_t *storage); +void db_bkpt_skip(void); -#define db_clear_single_step(regs) ddb_regs.tf_special.psr &= ~IA64_PSR_SS -#define db_set_single_step(regs) ddb_regs.tf_special.psr |= IA64_PSR_SS +#define db_set_single_step(regs) regs->tf_special.psr |= IA64_PSR_SS +#define db_clear_single_step(regs) regs->tf_special.psr &= ~IA64_PSR_SS #define IS_BREAKPOINT_TRAP(type, code) (type == IA64_VEC_BREAK) #define IS_WATCHPOINT_TRAP(type, code) 0 @@ -72,27 +72,16 @@ #define inst_load(ins) (ins & 0) #define inst_store(ins) (ins & 0) #define inst_unconditional_flow_transfer(ins) (ins & 0) - + #define branch_taken(ins, pc, regs) pc -/* - * Functions needed for software single-stepping. - */ - -/* No delay slots on Alpha. */ #define next_instr_address(v, b) ((db_addr_t) ((b) ? (v) : ((v) + 4))) u_long db_register_value(db_regs_t *, int); -u_int64_t *db_rse_current_frame(void); -u_int64_t *db_rse_previous_frame(u_int64_t *bsp, int sof); -u_int64_t *db_rse_register_address(u_int64_t *bsp, int regno); - -void db_read_bundle(db_addr_t addr, struct ia64_bundle *bp); -void db_write_bundle(db_addr_t addr, struct ia64_bundle *bp); -void db_write_breakpoint(db_addr_t addr, u_int64_t *storage); -void db_clear_breakpoint(db_addr_t addr, u_int64_t *storage); -void db_skip_breakpoint(void); +uint64_t *db_rse_current_frame(void); +uint64_t *db_rse_previous_frame(uint64_t *bsp, int sof); +uint64_t *db_rse_register_address(uint64_t *bsp, int regno); /* * Pretty arbitrary ==== //depot/projects/gdb/sys/ia64/include/kdb.h#3 (text+ko) ==== @@ -34,11 +34,13 @@ static __inline void kdb_cpu_clear_singlestep(void) { + kdb_frame->tf_special.psr &= ~IA64_PSR_SS; } static __inline void kdb_cpu_set_singlestep(void) { + kdb_frame->tf_special.psr |= IA64_PSR_SS; } static __inline void
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200404260227.i3Q2RqD6040093>