From owner-svn-src-all@freebsd.org Thu Sep 7 15:24:49 2017 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 79CD5E22787; Thu, 7 Sep 2017 15:24:49 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id D181167D80; Thu, 7 Sep 2017 15:24:48 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v87FOl9V003290; Thu, 7 Sep 2017 15:24:47 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v87FOlkR003289; Thu, 7 Sep 2017 15:24:47 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201709071524.v87FOlkR003289@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Thu, 7 Sep 2017 15:24:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r323268 - head/sys/arm64/arm64 X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: head/sys/arm64/arm64 X-SVN-Commit-Revision: 323268 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Sep 2017 15:24:49 -0000 Author: andrew Date: Thu Sep 7 15:24:47 2017 New Revision: 323268 URL: https://svnweb.freebsd.org/changeset/base/323268 Log: Make the bit mask of ARMv8 ID registers to print sparse to keep values close, but without having to change all values when new registers are added. Sponsored by: DARPA, AFRL Modified: head/sys/arm64/arm64/identcpu.c Modified: head/sys/arm64/arm64/identcpu.c ============================================================================== --- head/sys/arm64/arm64/identcpu.c Thu Sep 7 15:19:10 2017 (r323267) +++ head/sys/arm64/arm64/identcpu.c Thu Sep 7 15:24:47 2017 (r323268) @@ -88,14 +88,14 @@ struct cpu_desc cpu_desc[MAXCPU]; static u_int cpu_print_regs; #define PRINT_ID_AA64_AFR0 0x00000001 #define PRINT_ID_AA64_AFR1 0x00000002 -#define PRINT_ID_AA64_DFR0 0x00000004 -#define PRINT_ID_AA64_DFR1 0x00000008 -#define PRINT_ID_AA64_ISAR0 0x00000010 -#define PRINT_ID_AA64_ISAR1 0x00000020 -#define PRINT_ID_AA64_MMFR0 0x00000040 -#define PRINT_ID_AA64_MMFR1 0x00000080 -#define PRINT_ID_AA64_PFR0 0x00000100 -#define PRINT_ID_AA64_PFR1 0x00000200 +#define PRINT_ID_AA64_DFR0 0x00000010 +#define PRINT_ID_AA64_DFR1 0x00000020 +#define PRINT_ID_AA64_ISAR0 0x00000100 +#define PRINT_ID_AA64_ISAR1 0x00000200 +#define PRINT_ID_AA64_MMFR0 0x00001000 +#define PRINT_ID_AA64_MMFR1 0x00002000 +#define PRINT_ID_AA64_PFR0 0x00010000 +#define PRINT_ID_AA64_PFR1 0x00020000 struct cpu_parts { u_int part_id;