From owner-freebsd-hackers Sat Mar 18 12:02:05 1995 Return-Path: hackers-owner Received: (from majordom@localhost) by freefall.cdrom.com (8.6.10/8.6.6) id MAA23564 for hackers-outgoing; Sat, 18 Mar 1995 12:02:05 -0800 Received: from hda.com (hda.com [199.232.40.182]) by freefall.cdrom.com (8.6.10/8.6.6) with ESMTP id MAA23549; Sat, 18 Mar 1995 12:01:57 -0800 Received: (dufault@localhost) by hda.com (8.6.9/8.3) id OAA02775; Sat, 18 Mar 1995 14:58:35 -0500 From: Peter Dufault Message-Id: <199503181958.OAA02775@hda.com> Subject: SMP work To: rgrimes@gndrsh.aac.dev.com (Rodney W. Grimes) Date: Sat, 18 Mar 1995 14:58:34 -0500 (EST) Cc: jkh@freefall.cdrom.com, hackers@freefall.cdrom.com In-Reply-To: <199503181858.KAA21760@gndrsh.aac.dev.com> from "Rodney W. Grimes" at Mar 18, 95 10:58:55 am X-Mailer: ELM [version 2.4 PL24] Content-Type: text Content-Length: 1806 Sender: hackers-owner@FreeBSD.org Precedence: bulk Rodney W. Grimes writes: > > [CC: trimmed] > ... > > Which brings up the interesting question of whether or not we ever > > intend to get serious about this port. Jack is clearly out of the > > picture here, both for this and very possibly the SMP stuff, and I > > think it's time to either put it firmly aside for the foreseeable > > future or reassign one or both of these projects elsewhere. > > If Jack is out of the picture on SMP I can start the basics of it > rolling. I have been putting off on getting the dual PCI/ISA version > of the ASUS board for a week now to try and help Jack with getting > some code he is having problems with up and running. I already own > the CPU chips, so this is not that large of a cash outlay for me. I'd like to see a proposal for the kernel locking model. After many years of multithreaded programming and three years of Alliant MP work I'm always thinking about locking data structures to lock out the other CPUs. If we had a working model we could start to add some of this stuff when adding new code. > I know Jack put quite an effort into just getting the second CPU to > start up and from my last communications with him he had still not > got it to switch into protected mode. What is the I/O model for this ASUS? Do they have separate I/O busses, a single bus, or what? I assume the MP architecture is an Intel standard with Intel support chips that I know little about. (Intel licenced Alliant's Concurrency Control Unit for future generations of the i860 - yeah, right. Are they continuing that with their "merchant" MP?) Anyway, I'm interested in following this. Peter -- Peter Dufault Real Time Machine Control and Simulation HD Associates, Inc. Voice: 508 433 6936 dufault@hda.com Fax: 508 433 5267