From owner-svn-src-stable@FreeBSD.ORG Sat May 23 21:12:52 2015 Return-Path: Delivered-To: svn-src-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id A105D4E3; Sat, 23 May 2015 21:12:52 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 8EAD91E76; Sat, 23 May 2015 21:12:52 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t4NLCq1x096427; Sat, 23 May 2015 21:12:52 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t4NLCqdE096426; Sat, 23 May 2015 21:12:52 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201505232112.t4NLCqdE096426@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Sat, 23 May 2015 21:12:52 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r283329 - stable/10/sys/arm/ti X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 23 May 2015 21:12:52 -0000 Author: ian Date: Sat May 23 21:12:51 2015 New Revision: 283329 URL: https://svnweb.freebsd.org/changeset/base/283329 Log: MFC r276021, r279766: Reduce the diff in the Ti aintc between head and arm_intrng Fix spurious interrupts on arm am335x (beaglebone), by doing the EOI in both the post-filter and post-thread callbacks. Modified: stable/10/sys/arm/ti/aintc.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/arm/ti/aintc.c ============================================================================== --- stable/10/sys/arm/ti/aintc.c Sat May 23 21:04:15 2015 (r283328) +++ stable/10/sys/arm/ti/aintc.c Sat May 23 21:12:51 2015 (r283329) @@ -72,12 +72,20 @@ static struct resource_spec ti_aintc_spe static struct ti_aintc_softc *ti_aintc_sc = NULL; -#define aintc_read_4(reg) \ - bus_space_read_4(ti_aintc_sc->aintc_bst, ti_aintc_sc->aintc_bsh, reg) -#define aintc_write_4(reg, val) \ - bus_space_write_4(ti_aintc_sc->aintc_bst, ti_aintc_sc->aintc_bsh, reg, val) +#define aintc_read_4(_sc, reg) \ + bus_space_read_4((_sc)->aintc_bst, (_sc)->aintc_bsh, (reg)) +#define aintc_write_4(_sc, reg, val) \ + bus_space_write_4((_sc)->aintc_bst, (_sc)->aintc_bsh, (reg), (val)) +static void +aintc_post_filter(void *arg) +{ + + arm_irq_memory_barrier(0); + aintc_write_4(ti_aintc_sc, INTC_CONTROL, 1); /* EOI */ +} + static int ti_aintc_probe(device_t dev) { @@ -112,17 +120,19 @@ ti_aintc_attach(device_t dev) ti_aintc_sc = sc; - x = aintc_read_4(INTC_REVISION); + x = aintc_read_4(sc, INTC_REVISION); device_printf(dev, "Revision %u.%u\n",(x >> 4) & 0xF, x & 0xF); /* SoftReset */ - aintc_write_4(INTC_SYSCONFIG, 2); + aintc_write_4(sc, INTC_SYSCONFIG, 2); /* Wait for reset to complete */ - while(!(aintc_read_4(INTC_SYSSTATUS) & 1)); + while(!(aintc_read_4(sc, INTC_SYSSTATUS) & 1)); /*Set Priority Threshold */ - aintc_write_4(INTC_THRESHOLD, 0xFF); + aintc_write_4(sc, INTC_THRESHOLD, 0xFF); + + arm_post_filter = aintc_post_filter; return (0); } @@ -146,22 +156,17 @@ DRIVER_MODULE(aintc, simplebus, ti_aintc int arm_get_next_irq(int last_irq) { + struct ti_aintc_softc *sc = ti_aintc_sc; uint32_t active_irq; - if (last_irq != -1) { - aintc_write_4(INTC_ISR_CLEAR(last_irq >> 5), - 1UL << (last_irq & 0x1F)); - aintc_write_4(INTC_CONTROL,1); - } - /* Get the next active interrupt */ - active_irq = aintc_read_4(INTC_SIR_IRQ); + active_irq = aintc_read_4(sc, INTC_SIR_IRQ); /* Check for spurious interrupt */ if ((active_irq & 0xffffff80)) { - device_printf(ti_aintc_sc->sc_dev, - "Spurious interrupt detected (0x%08x)\n", active_irq); - aintc_write_4(INTC_SIR_IRQ, 0); + device_printf(sc->sc_dev, + "Spurious interrupt detected (0x%08x)\n", active_irq); + aintc_write_4(sc, INTC_SIR_IRQ, 0); return -1; } @@ -174,13 +179,17 @@ arm_get_next_irq(int last_irq) void arm_mask_irq(uintptr_t nb) { - aintc_write_4(INTC_MIR_SET(nb >> 5), (1UL << (nb & 0x1F))); + struct ti_aintc_softc *sc = ti_aintc_sc; + + aintc_write_4(sc, INTC_MIR_SET(nb >> 5), (1UL << (nb & 0x1F))); + aintc_write_4(sc, INTC_CONTROL, 1); /* EOI */ } void arm_unmask_irq(uintptr_t nb) { + struct ti_aintc_softc *sc = ti_aintc_sc; arm_irq_memory_barrier(nb); - aintc_write_4(INTC_MIR_CLEAR(nb >> 5), (1UL << (nb & 0x1F))); + aintc_write_4(sc, INTC_MIR_CLEAR(nb >> 5), (1UL << (nb & 0x1F))); }