From nobody Mon Sep 25 12:19:54 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4RvMQ26n3rz4rGJF; Mon, 25 Sep 2023 12:19:54 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4RvMQ26HCjz3gWC; Mon, 25 Sep 2023 12:19:54 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1695644394; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=oS3YtkzMSQ5IhvBlvAv042wzSw5PimWCOSnDGbwcOUI=; b=vkdLaqKxEDSHEVVeIE6crPO/einlxjI2F3Fj0dqL6uquOe1MbvkyoK6c9GPhpWh6qGoHxj 94lm/9wmz1w52WBr1awn03S2t27QBcuabxf+A/vkyPtG7BPeT+XJSG8T3WQ0YBJimC/ih6 ELW+ng4YHxiaeh1Rbw+I3X+s0SyQxHExHN2ZEzcqKuPn2/9qV0/FmnmptqvruPqZFpTtw8 TCTZ2oyBG8cTIFHYxcDJUB7iPopFT1MX6KDhc+xas+ZehVS47gwCabKJ6hlslL8I4htLmK e2kZbq6pQHg6O1g+mT2+ybV+Je608NidjC4bjsDdLTlwYyRbLqbFY68Y7eC1Mw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1695644394; a=rsa-sha256; cv=none; b=m83c/haeARklobA6vDeru0+kJJya9s/IgOl4sfSt10Z1b/M0JukqWMKhEi8edyOQFTwLr4 YoK9U61KUNyySa7KAKckWRGKEUsxa+ecz5JvcdNE4qE8bgjKLYaUo/J7/sUeMKMQwn5RUG XHiD+jHMJNiUu22B85+YcDN9LhpEJJEW6lUaw82t4gpezfwrZbSmS9Buvsw1IrDJ7YH9X2 mZsYJr4mpiHkguHijEpQU/8R65dTv8pQ7MPozCnWma0vufXYQlRbXEvzVMFSbyTsRu1eEK xYsSAz2qDukZ2jNaD8dpTA4wJPO32Dwqvm8CaO4HwT9r0mbcVsu3frurd4Vsvw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1695644394; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=oS3YtkzMSQ5IhvBlvAv042wzSw5PimWCOSnDGbwcOUI=; b=hpNRSSjIFpuzgJFNe2Zwr/6UOF27SbrVQzjHYi6qTP0XM1m6NwkIqLRi6mYGDdPCZsxIkB I801R6Ykd26CyJS45DIt3Qzk8kFqzsUKce/6VdQhoPbo4Nt7JBzJSApuItUTjgsFo9Sdhc AbBFbKcH41+drfjDc50Ca8zaYF/EzIgjx1n9aFqltSob4E/ImeTzpjNtiaVPcDvjwhPkTY za2ZL7ZfxTHmmwmdSqaSDPB7BLI3HtisxTHL6MhGnnw5/1YjTC2mHJDzj00wfCUMivYnXL BNAAJZtLsJBTDzwFjrkA+bXo4DBk4n6tcs2n2PsUgEURXlKq8jjtQS3uv2S5rA== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4RvMQ25Kkyz1SJ6; Mon, 25 Sep 2023 12:19:54 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 38PCJs5L078342; Mon, 25 Sep 2023 12:19:54 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 38PCJs7X078339; Mon, 25 Sep 2023 12:19:54 GMT (envelope-from git) Date: Mon, 25 Sep 2023 12:19:54 GMT Message-Id: <202309251219.38PCJs7X078339@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Andrew Turner Subject: git: 4df1447f2c76 - stable/13 - arm64: Fix errata workarounds that depend on smccc List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 4df1447f2c76d0db988197f3a05d48e15f976c7c Auto-Submitted: auto-generated The branch stable/13 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=4df1447f2c76d0db988197f3a05d48e15f976c7c commit 4df1447f2c76d0db988197f3a05d48e15f976c7c Author: Andrew Turner AuthorDate: 2023-09-18 16:34:51 +0000 Commit: Andrew Turner CommitDate: 2023-09-25 12:13:47 +0000 arm64: Fix errata workarounds that depend on smccc Some arm64 errata depend on calling into the firmware via the SMCCC interface. This needs to happen after the psci driver has attached as they share the interface. Fix this by allowing the workarounds to mark when they depend on device drivers attaching. This is only an issue on CPU 0 as the workarounds are applied later for the non-boot CPUs. Reviewed by: emaste Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D41916 (cherry picked from commit c643e82dba0b17b2716de4c9d44a3c9c547cbbd5) (cherry picked from commit 843bea18711d726cd2f0a3c3f9144b218e4de3e8) --- sys/arm64/arm64/cpu_errata.c | 50 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 47 insertions(+), 3 deletions(-) diff --git a/sys/arm64/arm64/cpu_errata.c b/sys/arm64/arm64/cpu_errata.c index 38148ff7066c..fee22240bb0e 100644 --- a/sys/arm64/arm64/cpu_errata.c +++ b/sys/arm64/arm64/cpu_errata.c @@ -47,6 +47,9 @@ struct cpu_quirks { cpu_quirk_install *quirk_install; u_int midr_mask; u_int midr_value; +#define CPU_QUIRK_POST_DEVICE (1 << 0) /* After device attach */ + /* e.g. needs SMCCC */ + u_int flags; }; static enum { @@ -64,32 +67,38 @@ static struct cpu_quirks cpu_quirks[] = { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A57,0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A72,0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A73,0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A75,0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX2, 0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = 0, .midr_value = 0, .quirk_install = install_ssbd_workaround, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, @@ -173,8 +182,8 @@ install_thunderx_bcast_tlbi_workaround(void) } } -void -install_cpu_errata(void) +static void +install_cpu_errata_flags(u_int mask, u_int flags) { u_int midr; size_t i; @@ -183,8 +192,43 @@ install_cpu_errata(void) for (i = 0; i < nitems(cpu_quirks); i++) { if ((midr & cpu_quirks[i].midr_mask) == - cpu_quirks[i].midr_value) { + cpu_quirks[i].midr_value && + (cpu_quirks[i].flags & mask) == flags) { cpu_quirks[i].quirk_install(); } } } + +/* + * Install any CPU errata we need. On CPU 0 we only install the errata that + * don't depend on device drivers as this is called early in the boot process. + * On other CPUs the device drivers have already attached so install all + * applicable errata. + */ +void +install_cpu_errata(void) +{ + /* + * Only install early CPU errata on CPU 0, device drivers may not + * have attached and some workarounds depend on them, e.g. to query + * SMCCC. + */ + if (PCPU_GET(cpuid) == 0) { + install_cpu_errata_flags(CPU_QUIRK_POST_DEVICE, 0); + } else { + install_cpu_errata_flags(0, 0); + } +} + +/* + * Install any errata workarounds that depend on device drivers, e.g. use + * SMCCC to install a workaround. + */ +static void +install_cpu_errata_late(void *dummy __unused) +{ + MPASS(PCPU_GET(cpuid) == 0); + install_cpu_errata_flags(CPU_QUIRK_POST_DEVICE, CPU_QUIRK_POST_DEVICE); +} +SYSINIT(install_cpu_errata_late, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE, + install_cpu_errata_late, NULL);