From owner-freebsd-hackers Thu Jan 18 15:18:58 1996 Return-Path: owner-hackers Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id PAA11269 for hackers-outgoing; Thu, 18 Jan 1996 15:18:58 -0800 (PST) Received: from Sysiphos (Sysiphos.MI.Uni-Koeln.DE [134.95.212.10]) by freefall.freebsd.org (8.7.3/8.7.3) with SMTP id PAA11255 for ; Thu, 18 Jan 1996 15:18:49 -0800 (PST) Received: by Sysiphos id AA11772 (5.67b/IDA-1.5 for hackers@freebsd.org); Fri, 19 Jan 1996 00:18:36 +0100 Message-Id: <199601182318.AA11772@Sysiphos> From: se@zpr.uni-koeln.de (Stefan Esser) Date: Fri, 19 Jan 1996 00:18:36 +0100 In-Reply-To: Heikki Suonsivu "kern/950: Two PCI bridge chips fail (multiple multiport ethernet boards)" (Jan 17, 1:26) X-Mailer: Mail User's Shell (7.2.6 alpha(2) 7/9/95) To: hsu@clinet.fi Subject: Re: kern/950: Two PCI bridge chips fail (multiple multiport ethernet boards) Sender: owner-hackers@FreeBSD.ORG Precedence: bulk On Jan 17, 1:26, Heikki Suonsivu wrote: Guess your BIOS is not doing a good job of initialising the PCI to PCI bridges ... } Using any combination of 2 or more multiport PCI ethernet boards } always fails correctly to install/probe the second or later cards. } } It seems that the first board is correctly set up and probed, } but for the next one pci code gets confused, trying to use } first card's data for the second one: } } - Two two-port boards: I've slightly cleaned up the probe messages: Probing for devices on the PCI bus: configuration mode 1 allows 32 devices. pci0:0: Silicon Integrated Systems, device=0x5511, class=bridge (host) chip0 rev 1 on pci0:1 chip1 rev 2 on pci0:11 bridge from pci0 to pci1 through 1. <== pci1 mapping regs: io:2280c0c0 mem:fbf0fbf0 pmem:fbf0fc00 chip2 rev 2 on pci0:12 bridge from pci0 to pci1 through 1. <== pci2 !!! mapping regs: io:2280b0b0 mem:fbe0fbe0 pmem:fbf0fc00 pci0: subordinate busses from 1 upto 1. Probing for devices on the PCI bus: de0 rev 35 int a irq 10 on pci1:4 mapreg[10] type=1 addr=0000c800 size=0080. de1 rev 35 int a irq 12 on pci1:5 mapreg[10] type=1 addr=0000c400 size=0080. Probing for devices on the PCI bus: de2 rev 35 int a irq 10 on pci1:4 mapreg[10] type=1 addr=0000c800 size=0080. de3 rev 35 int a irq 12 on pci1:5 mapreg[10] type=1 addr=0000c400 size=0080. PCI to PCI bridges have only been dealt with in the recently published PCI 2.1 specification. Your BIOS predates this, and it seems it got its own idea about the initialisation of bridge chips. It does in fact assign non overlapping memory and port ranges to each of the bridged PCI busses, but does not assign a bus number of 2 to the second bridge. Since I could not get any chip set technical data books from SiS, I don't know how to correct this. The problem is, that the CPU to PCI chip often has registers for the first and last bus number that are available through this chip. If those registers are both set to 1, then there will be no way to access PCI bus 2, since the PCI chip set will not generate the configuration cycles ... Can you get a more recent BIOS for your motherboard ? I'll add a conflicts check for this situation (i.e. several PCI to PCI bridges claim the same secondary bus numbers), but I'd rather not add code to change the CPU to PCI bridges configuration. This code had to be chip set specific, and this is definitely the job of the BIOS ... Please let me know whether a new BIOS is an option for you. If possible send boot messages from some other motherboard (with two multi channel cards). I'll add the conflict test, and will try to make it do the right thing (i.e. make the second chip use a PCI bus number of 2 on your system). But I have no idea whether reprogramming the 21050 chips ONLY will do any good (as said above, the main PCI chip might need to be reconfigured, too, and I have no docs on that). Regards, STefan -- Stefan Esser, Zentrum fuer Paralleles Rechnen Tel: +49 221 4706021 Universitaet zu Koeln, Weyertal 80, 50931 Koeln FAX: +49 221 4705160 ============================================================================== http://www.zpr.uni-koeln.de/~se