From owner-freebsd-hardware Mon Jul 22 09:51:05 1996 Return-Path: owner-hardware Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id JAA16144 for hardware-outgoing; Mon, 22 Jul 1996 09:51:05 -0700 (PDT) Received: from ns.frihet.com (root@frihet.bayarea.net [205.219.92.1]) by freefall.freebsd.org (8.7.5/8.7.3) with ESMTP id JAA16137 for ; Mon, 22 Jul 1996 09:51:02 -0700 (PDT) Received: from ns.frihet.com (tweten@localhost [127.0.0.1]) by ns.frihet.com (8.7.5/8.6.12) with ESMTP id JAA01328; Mon, 22 Jul 1996 09:49:56 -0700 (PDT) Message-Id: <199607221649.JAA01328@ns.frihet.com> X-Mailer: exmh version 1.6.7 5/3/96 Reply-To: "David E. Tweten" To: schofiel@xs4all.nl cc: hardware@freebsd.com Subject: Re: The multiple COM ports discussion Date: Mon, 22 Jul 1996 09:49:55 -0700 From: "David E. Tweten" Sender: owner-hardware@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk schofiel@xs4all.nl said: >4) In the PC/ISA scheme, interrupts are POSITIVE-GOING, EDGE triggered. > In the EISA scheme, interrupts are by the default compatible to this, > but can be configured to be ACTIVE LOW, LEVEL triggered. >5) TRistate interrupt line drivers are not neccessary in this scheme. What do you mean by "this scheme?" If you mean that "ACTIVE LOW, LEVEL triggered" is "this scheme," fine. All that is needed then is OPEN and ACTIVE LOW -- two states in ths strictest sense (though people often use "tristate" when all they really mean is that one state is OPEN). If "this scheme" is "POSITIVE-GOING, EDGE triggered," see my hardware concern below. >7) Multiple ISA-type interrupting devices can be placed on a single > interupt line, electrically. The ISA standard (no joke, there is one) > does not however closely specify how interrupt drivers should be > implemented for uniformity. Both ISA and EISA wire all interrupt "pins" on their motherboard connectors together. The only ISA standard I have any familiarity with is the 8 MHz IBM PC/AT, and the IBM-supplied boards that went with it. Those boards drove their interrupt lines with two states, ACTIVE HIGH and ACTIVE LOW. There was no OPEN state. There was no output resistor to mediate between "dualing" bus driver circuits. Therefore, there was no possibility of getting predictable results from putting two boards on the same interrupt. For each of the four combinations of two boards asserting or not asserting an interrupt you could get board-one dominance, board-two dominance, or you could get the privilege of replacing fried parts. It all depended upon the variable details of the driver circuits on both boards. Most of the time the hardware survived this kind of abuse because the board designers accounted for the possibility of people accidently installing two boards at the same interrupt. What is the mechanism used by the "ISA standard" you found, to handle the problem of dualing bus driver circuits? -- David E. Tweten | PGP Key fingerprint: | tweten@frihet.com 12141 Atrium Drive | E9 59 E7 5C 6B 88 B8 90 | tweten@and.com Saratoga, CA 95070-3162 | 65 30 2A A4 A0 BC 49 AE | (408) 446-4131