From owner-freebsd-arch@FreeBSD.ORG Tue Mar 16 08:35:53 2004 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id A810616A4CE; Tue, 16 Mar 2004 08:35:53 -0800 (PST) Received: from smtp.distributel.net (cns2.distributel.NET [66.38.181.21]) by mx1.FreeBSD.org (Postfix) with ESMTP id 5793443D1F; Tue, 16 Mar 2004 08:35:53 -0800 (PST) (envelope-from bmilekic@technokratis.com) Received: from godel.mtl.distributel.net (nat.MTL.distributel.NET [66.38.181.24]) by smtp.distributel.net (8.12.6/8.12.6) with ESMTP id i2GGZeM2095507; Tue, 16 Mar 2004 11:35:40 -0500 (EST) Received: from godel.mtl.distributel.net (localhost [127.0.0.1]) i2GGXx6p007404; Tue, 16 Mar 2004 11:33:59 -0500 (EST) (envelope-from bmilekic@technokratis.com) Received: (from bmilekic@localhost)i2GGXx4p007403; Tue, 16 Mar 2004 11:33:59 -0500 (EST) (envelope-from bmilekic@technokratis.com) X-Authentication-Warning: godel.mtl.distributel.net: bmilekic set sender to bmilekic@technokratis.com using -f Date: Tue, 16 Mar 2004 11:33:59 -0500 From: Bosko Milekic To: John Baldwin Message-ID: <20040316163359.GA7365@technokratis.com> References: <1077137806.28133.10.camel@herring.nlsystems.com> <20040316142110.GA6802@technokratis.com> <1079448788.10695.1.camel@builder02.qubesoft.com> <200403161012.09174.john@baldwin.cx> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200403161012.09174.john@baldwin.cx> User-Agent: Mutt/1.4.1i cc: arch@freebsd.org cc: freebsd-arch@freebsd.org Subject: Re: Read Copy Update X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Mar 2004 16:35:53 -0000 On Tue, Mar 16, 2004 at 10:12:09AM -0500, John Baldwin wrote: > > I was imagining a a pcpu flag which was a 'soft cli', i.e. if a cpu > > fields an interrupt and the soft cli flag is set, it just clears the > > interrupt flag in the trapframe and returns. It all works out the same > > in the end. No because if you're in the middle of modifying a pcpu flag and you take an interrupt you may get scheduled over to another CPU. You would also have to temporarily pin down the thread to the current CPU unless you do it with an in-thread flag. By the way, the point of all this is that with a combination of soft-disables and short-term scheduler pinning we should be able to take the common memory allocation case in UMA out of any lock requirements (lockless in common case). > I have this partly implemented, but because the VM86 code really sucks (it > just always enables interrupts) the invariants checks I have don't make it to > single user mode. I haven't decided what to do about VM86 yet, and I also > haven't handled the problem of switching away from interrupt context (for > ithread preemption) and switching back and making that all work correctly w/o > possibly dropping interrupts. Do you have your current changes in a separate p4 repo somewhere? > -- > John Baldwin <>< http://www.baldwin.cx/~john/ > "Power Users Use the Power to Serve" = http://www.FreeBSD.org -- Bosko Milekic * bmilekic@technokratis.com * bmilekic@FreeBSD.org TECHNOkRATIS Consulting Services * http://www.technokratis.com/ "It is impossible for anyone to begin to learn what he believes he already knows." -- Epictetus (c.a.d. 55-c135)