From owner-svn-src-head@freebsd.org Thu Jul 27 23:14:18 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7037DDB33B6; Thu, 27 Jul 2017 23:14:18 +0000 (UTC) (envelope-from zbb@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 3D67168FCD; Thu, 27 Jul 2017 23:14:18 +0000 (UTC) (envelope-from zbb@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v6RNEHax033482; Thu, 27 Jul 2017 23:14:17 GMT (envelope-from zbb@FreeBSD.org) Received: (from zbb@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v6RNEHwQ033479; Thu, 27 Jul 2017 23:14:17 GMT (envelope-from zbb@FreeBSD.org) Message-Id: <201707272314.v6RNEHwQ033479@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: zbb set sender to zbb@FreeBSD.org using -f From: Zbigniew Bodek Date: Thu, 27 Jul 2017 23:14:17 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r321633 - in head/sys/arm: arm include X-SVN-Group: head X-SVN-Commit-Author: zbb X-SVN-Commit-Paths: in head/sys/arm: arm include X-SVN-Commit-Revision: 321633 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Jul 2017 23:14:18 -0000 Author: zbb Date: Thu Jul 27 23:14:17 2017 New Revision: 321633 URL: https://svnweb.freebsd.org/changeset/base/321633 Log: Fix TEX index acquisition using L2 attributes The TEX index is selected using (TEX0 C B) bits from the L2 descriptor. Use correct index by masking and shifting those bits accordingly. Differential Revision: https://reviews.freebsd.org/D11703 Modified: head/sys/arm/arm/pmap-v6.c head/sys/arm/include/pte-v6.h Modified: head/sys/arm/arm/pmap-v6.c ============================================================================== --- head/sys/arm/arm/pmap-v6.c Thu Jul 27 23:09:12 2017 (r321632) +++ head/sys/arm/arm/pmap-v6.c Thu Jul 27 23:14:17 2017 (r321633) @@ -525,8 +525,8 @@ pmap_remap_vm_attr(vm_memattr_t old_attr, vm_memattr_t int old_idx, new_idx; /* Map VM memattrs to indexes to tex_class table. */ - old_idx = pte2_attr_tab[(int)old_attr]; - new_idx = pte2_attr_tab[(int)new_attr]; + old_idx = PTE2_ATTR2IDX(pte2_attr_tab[(int)old_attr]); + new_idx = PTE2_ATTR2IDX(pte2_attr_tab[(int)new_attr]); /* Replace TEX attribute and apply it. */ tex_class[old_idx] = tex_class[new_idx]; Modified: head/sys/arm/include/pte-v6.h ============================================================================== --- head/sys/arm/include/pte-v6.h Thu Jul 27 23:09:12 2017 (r321632) +++ head/sys/arm/include/pte-v6.h Thu Jul 27 23:14:17 2017 (r321633) @@ -149,10 +149,12 @@ #define L2_NX 0x00000001 /* Not executable */ #define L2_B 0x00000004 /* Bufferable page */ #define L2_C 0x00000008 /* Cacheable page */ +#define L2_CB_SHIFT 2 /* C,B bit field shift */ #define L2_AP(x) ((x) << 4) #define L2_AP0 0x00000010 /* access permissions bit 0*/ #define L2_AP1 0x00000020 /* access permissions bit 1*/ -#define L2_TEX(x) ((x) << 6) /* type extension */ +#define L2_TEX_SHIFT 6 /* type extension field shift */ +#define L2_TEX(x) ((x) << L2_TEX_SHIFT) /* type extension */ #define L2_TEX0 0x00000040 /* type extension bit 0 */ #define L2_TEX1 0x00000080 /* type extension bit 1 */ #define L2_TEX2 0x00000100 /* type extension bit 2 */ @@ -271,6 +273,10 @@ #define PTE2_FRAME L2_S_FRAME #define PTE2_ATTR_MASK (L2_TEX0 | L2_C | L2_B) +/* PTE2 attributes to TEX class index: (TEX0 C B) */ +#define PTE2_ATTR2IDX(attr) \ + ((((attr) & (L2_C | L2_B)) >> L2_CB_SHIFT) | \ + (((attr) & L2_TEX0) >> (L2_TEX_SHIFT - L2_CB_SHIFT))) #define PTE2_AP_KR (PTE2_RO | PTE2_NM) #define PTE2_AP_KRW 0