Date: Sat, 31 Dec 2022 19:38:25 +0000 From: bugzilla-noreply@freebsd.org To: riscv@FreeBSD.org Subject: [Bug 268684] [PATCH] riscv libc: fix longjmp with 0 value Message-ID: <bug-268684-40250@https.bugs.freebsd.org/bugzilla/>
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https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D268684 Bug ID: 268684 Summary: [PATCH] riscv libc: fix longjmp with 0 value Product: Base System Version: CURRENT Hardware: riscv OS: Any Status: New Severity: Affects Many People Priority: --- Component: riscv Assignee: riscv@FreeBSD.org Reporter: alois+freebsd@aloisklink.com Created attachment 239166 --> https://bugs.freebsd.org/bugzilla/attachment.cgi?id=3D239166&action= =3Dedit `git format-patch` patch file On RISC-V, calling `longjmp(x, 0);` makes `setjmp(x)` return 0, which norma= lly causes an infinite loop, and is against the ISO C standard for setjmp/longj= mp.=20 Instead, using a value of 0 should make `setjmp` return 1: > The `longjmp` function cannot cause the `setjmp` macro to return the > value 0; if `val` is 0, the `setjmp` macro returns the value 1. > > _Taken from =C2=A77.13.2.1.4 of the C99 spec_ See https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D268521 for my simil= ar patch for arm64 libc. That patch also has a test-case that I used to test t= his RISC-V implementation. --- I think I've actually managed to beat the compiler in this patch. Both GCC and Clang do something like the following at `-Os`: ```Assembly mv a0,a1 bne a1,zero,.L2 li a0,1 .L2: ret ``` It took a while of scouring the RISC-V ISA spec (it's my first time using RISC-V assembly), but I found a method that doesn't use branching and has l= ess one less instruction! --=20 You are receiving this mail because: You are the assignee for the bug.=
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