From owner-freebsd-smp Mon Jul 2 13:33:54 2001 Delivered-To: freebsd-smp@freebsd.org Received: from grace.speakeasy.org (grace.speakeasy.org [216.254.0.2]) by hub.freebsd.org (Postfix) with SMTP id 94A3937B403 for ; Mon, 2 Jul 2001 13:33:51 -0700 (PDT) (envelope-from seanj@speakeasy.org) Received: (qmail 24960 invoked by uid 6969); 2 Jul 2001 20:32:26 -0000 Received: from localhost (sendmail-bs@127.0.0.1) by localhost with SMTP; 2 Jul 2001 20:32:26 -0000 Date: Mon, 2 Jul 2001 13:32:26 -0700 (PDT) From: seanj To: Julian Elischer Cc: Alfred Perlstein , "Michael C . Wu" , "E.B. Dreger" , "smp@FreeBSD.ORG" Subject: Re: per cpu runqueues, cpu affinity and cpu binding. In-Reply-To: Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-freebsd-smp@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.org http://www.cs.washington.edu/research/smt/ http://www.cs.washington.edu/research/smt/papers/ieee_micro.pdf http://www.bearcave.com/software/java/comp_links.html Supposedly an upcomping XEON processor will have SMT / ILP. Not to prognosticate but I think having TEUs (thread execution units) will be a very good idea (tm). What about architectures where the CPUs might share the same L2/L3 cache? Multichip modules or multiple on die cpus? IBM Power4? Two procs, one L2. http://www.eetimes.com/story/OEG19990804S0023 http://arstechnica.com/cpu/4q99/majc/majc-1.html This is very probably most likely sorta in our near future. Sean. On Mon, 2 Jul 2001, Julian Elischer wrote: > > > On Mon, 2 Jul 2001, Alfred Perlstein wrote: > > > * Julian Elischer [010702 14:58] wrote: > > > > > > If you select to run 2 thread carriers (see other mail on nomenclature)> > > > (KSEs) then you have specifically asked for 2 processors worth of > > > concurrency so we ASSUME you know what you are doing.. If you want to run > > > all the threads on a single processor to get better cache activity, then > > > you should't ASK to run on 2 (or more) processors. > > > > Agreed, however don't forget about the multiple thread execution > > units that may become available, meaning that as long as you share > > an address space you can run two (or more) threads in parrallel on > > a single processor. You wouldn't want to preclude us of taking > > advantage of that if it becomes available. > > If that architecture takes off (I have my doubts.. ALPHA was the only one > trying that), then we can change the rules about only allowing one thread > container per processor (and limit it to the number of thread execution > units). > > > > > To Unsubscribe: send mail to majordomo@FreeBSD.org > with "unsubscribe freebsd-smp" in the body of the message > To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message