From owner-freebsd-arm@FreeBSD.ORG Mon Jan 19 16:42:28 2015 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 37E68E31; Mon, 19 Jan 2015 16:42:28 +0000 (UTC) Received: from mail-qg0-x233.google.com (mail-qg0-x233.google.com [IPv6:2607:f8b0:400d:c04::233]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id D6215782; Mon, 19 Jan 2015 16:42:27 +0000 (UTC) Received: by mail-qg0-f51.google.com with SMTP id z107so4149115qgd.10; Mon, 19 Jan 2015 08:42:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=4+0+lzGMTpj3TFtzXdHvIcT/Uwvui+aEzVKndyDuJRg=; b=013a9sH53uli2ubt/12A1sGVfQsPN56fjD1tjHnNZxrXLukyGDPSB2jnCql+39Xioy XGxO6+fAxPRHbdcXft5q7UiGedTjI/ymf4ZD66m1A2Su6YnZDiojI9X/ArTCDsLc58S8 5l2b9kefcHg3bnQlNCpeA9vX7HDmU4cN0dC6Vwue8jRPgcMJdh0N3IJ18kqwE7CPog2h J+Bo1skM9MAUdjY1S4frT1URIQhT6yLNwbWMtT2tF1I0JQIsBWBmSyuePS0aFF/yIx8B tMTusN/tZPEY+Vx9zFKOqYbKsE4RaF6mfJ92DEkZUEsPLo4hZ3Ajaym2Db6wVLU4oePz /aZQ== MIME-Version: 1.0 X-Received: by 10.229.192.5 with SMTP id do5mr49464707qcb.12.1421685742803; Mon, 19 Jan 2015 08:42:22 -0800 (PST) Received: by 10.140.82.180 with HTTP; Mon, 19 Jan 2015 08:42:22 -0800 (PST) In-Reply-To: <54BA9888.1020303@freebsd.org> References: <54BA9888.1020303@freebsd.org> Date: Mon, 19 Jan 2015 17:42:22 +0100 Message-ID: Subject: Re: interrupt framework From: Svatopluk Kraus To: Nathan Whitehorn Content-Type: text/plain; charset=UTF-8 X-Content-Filtered-By: Mailman/MimeDel 2.1.18-1 Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Jan 2015 16:42:28 -0000 On Sat, Jan 17, 2015 at 6:14 PM, Nathan Whitehorn wrote: > > On 01/15/15 05:51, Svatopluk Kraus wrote: >> >> Hi community, >> >> I and Michal Meloun have done some work on ARM interrupt framework and >> this is the result. >> >> We've started with intrng project with Ian's WIP changes, have looked >> at Andrew's ARM64 git repository, and this is how we think an >> interrupt framework should look like. We've implemented it with >> removable interrupt controllers in mind (PCI world). It's not finished >> from this point of view, however some functions are more complex >> because of it. >> >> It's tested on pandaboard and only GIC is implemented now. There is no >> problem to implement it to other controllers. We are open to questions >> and can finish our work considering any comments. Whoever is waiting >> for ARM interrupt framework as we were, you are welcome to test it. >> Whoever is welcome. The patches are done against FreeBSD-11-current >> revision 277210. There are two new files. >> >> ARM_INTRNG option must be added to board configuration file for new >> framework. >> >> There are still some things not implemented and some things which >> should be discussed like PPI support. For example, how to enable PPI >> interrupt on other CPUs when they are already running? >> >> We keep in mind that an interrupt framework should be helpfull but >> general enough to not dictate interrupt controlles too much. Thus we >> try to keep some things as much separated as possible. Each interrupt >> is represented by an interrupt source (ISRC) in the framework. An ISRC >> is described by an interrupt number which is much more an unique >> resource handle - totally independent on internal representation of >> interrupts in any interrupt controller. >> >> An interrupt is described by cells in FDT world. The cells can be >> decoded only by associated interrupt controller and as such, they are >> transparent for interrupt framework. The framework provides >> arm_fdt_map_irq() function which maps this transparent cells to an >> interrupt number. It creates an ISRC, saves cells on it, and once when >> associated interrupt controller is registered, it provides the ISRC >> with cells into the controller. >> >> It's a controller responsibility to save an ISRC associated with >> cells. An ISRC is transparent for any controller. However, an >> controller can set/get its data to/from an ISRC. Further, an >> controller should set a name to an ISRC according to internal >> representation of associated interrupt. >> >> An controller interrupt dispatch function can call framework only if >> it has associated ISRC to received interrupt. >> >> For legacy reason, there is arm_namespace_map_irq() function. An >> interrupt is described by namespace type and a number from the >> namespace. It's intented for use with no FDT drivers. Now, it's used >> for mapping an IPI on a controller. >> >> We think that it's better to call chained controllers (with filter >> only) without MI interrupt framework overhead, so we implemented >> shortcut. It could be utilized by INTR_SOLO flag during >> bus_setup_intr(). >> >> Only an interrupt controller can really know its position in interrupt >> controller's tree. So root controller must claim itself as a root. In >> FDT world, according to ePAPR approved version 1.1 from 08 April 2011, >> page 30: >> >> "The root of the interrupt tree is determined when traversal of the >> interrupt tree reaches an interrupt controller node without an >> interrupts property and thus no explicit interrupt parent." >> >> Thus there are no need for any non-standard things in DTS files. >> >> Svata >> > > > I took a look through intrng.c and had a couple comments about the FDT > mapping stuff: > > 1. You use the device tree node handles as lookup keys rather than xref > handles. These are not necessarily stable, so you should use xref handles > instead. > > 2. If you make change (1), you don't depend on any OF_* stuff and can use > the same code with the PIC node ID as an opaque key on non-FDT platforms. We > do this on PowerPC as well, which has been very useful. It will also save > some #ifdef. > -Nathan > Thanks. I did changes due to (1). Considering (2), I understand what you are doing in PowerPC, but it's not something I could adapt so easily. Hiding phandle_t behind uint32_t is clever, saves a few FDT #ifdefs, but makes things a little mysterious. Even if we will think about this uint32_t like some kind of key, there should be a function which convert phandle_t to that uint32_t key. I'm attaching new version of intrng.c with change (1) and with some more little adjustments. Svata