From owner-cvs-all Tue Jul 18 14:47:28 2000 Delivered-To: cvs-all@freebsd.org Received: from pluto.plutotech.com (mail.plutotech.com [206.168.67.137]) by hub.freebsd.org (Postfix) with ESMTP id DBCE137BB92; Tue, 18 Jul 2000 14:47:22 -0700 (PDT) (envelope-from gibbs@plutotech.com) Received: from caspian.plutotech.com (root@mail.plutotech.com [206.168.67.137]) by pluto.plutotech.com (8.9.2/8.9.1) with ESMTP id PAA56521; Tue, 18 Jul 2000 15:46:45 -0600 (MDT) (envelope-from gibbs@plutotech.com) Message-Id: <200007182146.PAA56521@pluto.plutotech.com> X-Mailer: exmh version 2.1.1 10/15/1999 To: =?ISO-8859-1?Q?G=E9rard_Roudier?= Cc: mjacob@feral.com, cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/cam cam_ccb.h cam_xpt.c src/sys/cam/scsi scsi_all.c scsi_message.h src/sys/dev/aic7xxx aicasm_insformat.h 93cx6.c 93cx6.h ahc_eisa.c ahc_pci.c aic7xxx.c aic7xxx.h aic7xxx.reg aic7xxx.seq aicasm.c aicasm.h aicasm_gram.y ... In-Reply-To: Your message of "Tue, 18 Jul 2000 23:09:56 +0200." Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Date: Tue, 18 Jul 2000 15:47:27 -0600 From: "Justin T. Gibbs" Sender: owner-cvs-all@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG > > >First, thanks for your commit. I will look into and steal any good idea = >from you I will found. :-) This doesn't change the CAM API for SIMs. I basically lopped off the new SET/GET transfer settings from my latest driver and faked the rest of the driver out. Its not perfect, but it will do until the API is changed. >> I'm hoping that being able to address 512GB will be enough >> for a while. I'd rather not expand the size of the S/G list >> members for address space no-one will be touching for the >> foreseeable future. > >This does not seem so simple. >Most systems I read about that allow 64 bit addressing from the PCI BUS = >require some high address bits beyond bit 39 to be set in the address = >for the bridge to understand 64 bit DMA adressing. Well, for systems where a full 64bits are required for their "bus dma" implementation, I'll just have to bite the bullet and expand the S/G list format. The chips do support a full 8byte address, I just didn't want to pay the full space price (including in the S/G prefetch buffer on the chip) on all systems. >Hmmm... Intel PAE Painful Address Extension seems simple compared to = >32 bit PCI chips extended to 64 bit PCI addressing. It seems that this is only the case for architectures that do not map physical =3D=3D pci address space. -- Justin To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message