From owner-svn-src-all@freebsd.org Wed Jun 29 23:33:45 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 6B28FB86D0C; Wed, 29 Jun 2016 23:33:45 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 1BE9221F4; Wed, 29 Jun 2016 23:33:45 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u5TNXiQQ049470; Wed, 29 Jun 2016 23:33:44 GMT (envelope-from gonzo@FreeBSD.org) Received: (from gonzo@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u5TNXiqF049469; Wed, 29 Jun 2016 23:33:44 GMT (envelope-from gonzo@FreeBSD.org) Message-Id: <201606292333.u5TNXiqF049469@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: gonzo set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko Date: Wed, 29 Jun 2016 23:33:44 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r302287 - head/sys/mips/malta X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Jun 2016 23:33:45 -0000 Author: gonzo Date: Wed Jun 29 23:33:44 2016 New Revision: 302287 URL: https://svnweb.freebsd.org/changeset/base/302287 Log: Fixed FreeBSD/mips MALTA support for QEMU Recource management functions in GT PCI controller driver treated memory/IO resources as KSEG1 addresses, later during activation these values would be increased by KSEG1 base again rendering the address invalid and causing "bus error" trap. Actual logic was converted to use real physical addresses, so mapping takes place only during activation. Submitted by: Aleksandr Rybalko Approved by: re (gjb) Modified: head/sys/mips/malta/gt_pci.c Modified: head/sys/mips/malta/gt_pci.c ============================================================================== --- head/sys/mips/malta/gt_pci.c Wed Jun 29 22:54:01 2016 (r302286) +++ head/sys/mips/malta/gt_pci.c Wed Jun 29 23:33:44 2016 (r302287) @@ -272,7 +272,7 @@ gt_pci_attach(device_t dev) sc->sc_st = mips_bus_space_generic; /* Use KSEG1 to access IO ports for it is uncached */ - sc->sc_io = MIPS_PHYS_TO_KSEG1(MALTA_PCI0_IO_BASE); + sc->sc_io = MALTA_PCI0_IO_BASE; sc->sc_io_rman.rm_type = RMAN_ARRAY; sc->sc_io_rman.rm_descr = "GT64120 PCI I/O Ports"; /* @@ -285,7 +285,7 @@ gt_pci_attach(device_t dev) } /* Use KSEG1 to access PCI memory for it is uncached */ - sc->sc_mem = MIPS_PHYS_TO_KSEG1(MALTA_PCIMEM1_BASE); + sc->sc_mem = MALTA_PCIMEM1_BASE; sc->sc_mem_rman.rm_type = RMAN_ARRAY; sc->sc_mem_rman.rm_descr = "GT64120 PCI Memory"; if (rman_init(&sc->sc_mem_rman) != 0 || @@ -310,9 +310,9 @@ gt_pci_attach(device_t dev) if (bus_space_map(sc->sc_st, IO_ICU2, 2, 0, &sc->sc_ioh_icu2) != 0) device_printf(dev, "unable to map ICU2 registers\n"); #else - sc->sc_ioh_elcr = sc->sc_io + 0x4d0; - sc->sc_ioh_icu1 = sc->sc_io + IO_ICU1; - sc->sc_ioh_icu2 = sc->sc_io + IO_ICU2; + sc->sc_ioh_elcr = MIPS_PHYS_TO_KSEG1(sc->sc_io + 0x4d0); + sc->sc_ioh_icu1 = MIPS_PHYS_TO_KSEG1(sc->sc_io + IO_ICU1); + sc->sc_ioh_icu2 = MIPS_PHYS_TO_KSEG1(sc->sc_io + IO_ICU2); #endif