Date: Mon, 29 Jun 2009 14:24:45 +0200 From: Hans Petter Selasky <hselasky@c2i.net> To: Piotr =?utf-8?q?Zi=C4=99cik?= <kosmo@semihalf.com> Cc: freebsd-arm@freebsd.org, freebsd-usb@freebsd.org, thompsa@freebsd.org Subject: Re: CPU Cache and busdma usage in USB Message-ID: <200906291424.46954.hselasky@c2i.net> In-Reply-To: <200906291416.13749.kosmo@semihalf.com> References: <200906231035.43096.kosmo@semihalf.com> <200906291337.43635.hselasky@c2i.net> <200906291416.13749.kosmo@semihalf.com>
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On Monday 29 June 2009 14:16:13 Piotr Zi=C4=99cik wrote: > Look for bus_dmamap_sync() sync description, last sentence: > <cite> > If read and write operations are not preceded and followed by the > appropriate synchronization operations, behavior is undefined. > </cite> I don't think this is a problem. I do flush read buffers before using them,= =20 and invalidate them afterwards. Write buffers only get flushed once. =2D-HPS
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