From owner-freebsd-arm@FreeBSD.ORG Mon Jun 29 13:25:19 2009 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 10720106564A for ; Mon, 29 Jun 2009 13:25:19 +0000 (UTC) (envelope-from hselasky@c2i.net) Received: from swip.net (mailfe12.tele2.se [212.247.155.97]) by mx1.freebsd.org (Postfix) with ESMTP id 9163F8FC08 for ; Mon, 29 Jun 2009 13:25:18 +0000 (UTC) (envelope-from hselasky@c2i.net) X-Cloudmark-Score: 0.000000 [] X-Cloudmark-Analysis: v=1.0 c=1 a=Hrwt8fWgTlIA:10 a=gg2W7PyvkLb8p4ie143lBA==:17 a=k7jeZpGbzUPkrY7CcIoA:9 a=DB5qQmvbDGNFBkEQwdYoMfsj_BYA:4 Received: from [194.248.135.20] (account mc467741@c2i.net HELO laptop.adsl.tele2.no) by mailfe12.swip.net (CommuniGate Pro SMTP 5.2.13) with ESMTPA id 1096649166; Mon, 29 Jun 2009 14:25:15 +0200 From: Hans Petter Selasky To: Piotr =?utf-8?q?Zi=C4=99cik?= Date: Mon, 29 Jun 2009 14:24:45 +0200 User-Agent: KMail/1.11.4 (FreeBSD/8.0-CURRENT; KDE/4.2.4; i386; ; ) References: <200906231035.43096.kosmo@semihalf.com> <200906291337.43635.hselasky@c2i.net> <200906291416.13749.kosmo@semihalf.com> In-Reply-To: <200906291416.13749.kosmo@semihalf.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Message-Id: <200906291424.46954.hselasky@c2i.net> Cc: freebsd-arm@freebsd.org, freebsd-usb@freebsd.org, thompsa@freebsd.org Subject: Re: CPU Cache and busdma usage in USB X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 29 Jun 2009 13:25:19 -0000 On Monday 29 June 2009 14:16:13 Piotr Zi=C4=99cik wrote: > Look for bus_dmamap_sync() sync description, last sentence: > > If read and write operations are not preceded and followed by the > appropriate synchronization operations, behavior is undefined. > I don't think this is a problem. I do flush read buffers before using them,= =20 and invalidate them afterwards. Write buffers only get flushed once. =2D-HPS