Date: Tue, 12 Nov 2013 18:41:34 -0500 From: George Mitchell <george+freebsd@m5p.com> To: Ian Lepore <ian@FreeBSD.org> Cc: freebsd-arm@FreeBSD.org Subject: Re: FreeBSD on HardKernel's ODROID platform Message-ID: <5282BCAE.1000707@m5p.com> In-Reply-To: <1384274735.31172.299.camel@revolution.hippie.lan> References: <106622132.66623.1384225190003.JavaMail.mail@webmail07> <20131112073941.GA19103@mail.bsdpad.com> <52820D9C.8060707@m5p.com> <1384274735.31172.299.camel@revolution.hippie.lan>
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On 11/12/13 11:45, Ian Lepore wrote: > On Tue, 2013-11-12 at 06:14 -0500, George Mitchell wrote: >> On 11/12/13 02:39, Ruslan Bukin wrote: >>> [...] >>> We suspect that uboot sets incorrect values for cpu clocks >>> and/or voltage regulators. In result we have prefetch abort >>> after first interrupt received. >>> [...] >> >> Could this be connected to the persistent prefetch abort problem I've >> been having in my Raspberry Pi? -- George Mitchell > > I suspected the same thing on my wandboard with the wrong-endian > prefetch abort problem, and noticed that u-boot was violating some of > the imx6 rules for voltage regulation, so with great hopes for a fix I > added some code to the freebsd early kernel init to increase the voltage > slightly and get all 3 regulators in range with each other according to > what the manual said... it didn't help. > > -- Ian > Too bad, but thanks for checking. Any other progress on the problem? -- George
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