From owner-freebsd-hackers Thu Nov 13 19:03:57 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.7/8.8.7) id TAA18219 for hackers-outgoing; Thu, 13 Nov 1997 19:03:57 -0800 (PST) (envelope-from owner-freebsd-hackers) Received: from ns.mt.sri.com (SRI-56K-FR.mt.net [206.127.65.42]) by hub.freebsd.org (8.8.7/8.8.7) with ESMTP id TAA18205 for ; Thu, 13 Nov 1997 19:03:53 -0800 (PST) (envelope-from nate@rocky.mt.sri.com) Received: from rocky.mt.sri.com (rocky.mt.sri.com [206.127.76.100]) by ns.mt.sri.com (8.8.8/8.8.8) with ESMTP id UAA23879 for ; Thu, 13 Nov 1997 20:03:50 -0700 (MST) (envelope-from nate@rocky.mt.sri.com) Received: (from nate@localhost) by rocky.mt.sri.com (8.7.5/8.7.3) id UAA12385; Thu, 13 Nov 1997 20:03:48 -0700 (MST) Date: Thu, 13 Nov 1997 20:03:48 -0700 (MST) Message-Id: <199711140303.UAA12385@rocky.mt.sri.com> From: Nate Williams MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit To: hackers@freebsd.org Subject: FreeBSD interrupt code experts? X-Mailer: VM 6.29 under 19.15 XEmacs Lucid Sender: owner-freebsd-hackers@freebsd.org X-Loop: FreeBSD.org Precedence: bulk I'm trying to track down a bug in the pccard code. Basically, I need to have the PCIC controller interrupt to have 'priority' over any of the device interrupts. I *thought* the code that is in the tree implements this correctly, but apparently not as some have pointed out in both public and private email by showing log messages. So, does anyone know what is wrong with the current code, or can help me debug it? Bruce has been too busy to help significantly, so I need some other expert. What's happening now is that depending on the IRQ's in question, the PCIC controller *can* interrupt the card driver (desired), or if the PCIC controller and the card driver's interrupts are allocated differently (at boot time, not swapped at runtime) the card driver interrupt is *NOT* capable of being interrupt by the PCIC controller. The code and masks are obviously registered the same way both time, just the interrupt #'s have changed. I know of one possible bug in the code now (the pcic controller's interrupt mask is not properly registered), but that shouldn't affect the PCIC ISR from interrupting the card driver's ISR. The card driver's ISR is only affected by their own interrupt masks. When I look at the current code (which I wrote) it appears to be doing the exact opposite of what I want it to know do *now* (I need to change things so they are exactly opposite of my original design), but Bruce assures me it's correct for what I now intend to do. In any case, I'm getting a bit confused, so I need someone who has time to straighten me out and explain to me that why what I wrote originally was backward, or explain to me it was correct with bugs in it. No matter what, the code as it stands doesn't do what I intended it to do originally, nor what I need it to do now correctly. Nate