From nobody Mon Sep 25 13:46:20 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4RvPKn0pS9z4rMLX; Mon, 25 Sep 2023 13:46:21 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4RvPKn030hz4MqZ; Mon, 25 Sep 2023 13:46:21 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1695649581; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=/4jOv4Qm9JLJQIFwq+/ta7a16X5ZiBZ/aSv6w+ROcqI=; b=uZwBtm/OmxcuYns8tZ53xFzramTzfvY4z9Pzm/PlYg59qN0NkAxLJbc79noCT5KqSQnW32 Krw8LTBevtjPhOqVemdHlXtwQE/mrkUotcW8pkgTUZarca1U7gMwebxXTWZtG3E+IyX3Or 18fAeZvY08qUvpszA1KwKpZPKV4jtSNiN7ju/UAJ0482P3u85Roqsaa8/2Dk/gXEvI3Opx nz2XqOYo6N4amY5gbJAvpJI09RnoDcaOSK+ypPsjd8UNsEYvRfJFWvbyg07oty24d5+d7F cbqoVpo/5SCd8oQrRmkzqsVfR3opaVHsS6OBg+bFgz4q1F6xqM9r5EddbhxOHA== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1695649581; a=rsa-sha256; cv=none; b=SBgnldJSAtmos1QS+yJhCFKU3pes5Y84gAFl2Emg8UoHh289n3/OeviFYCcVR+k7b70Rfk L1ARIX8E6EM5XVNO5XGMnbqWX1tyNm5V/FRb4IXh+oK4VR0e0Kmw4hUtZqYd9lCW8YCXdw p1HyqdDGy196eXbhMcdw0uhkNam9W/nErS7ksOID5li9A8AfkTRfOvVtVUvn41whPBdbU6 BPnc609e8AabrMnkKtviZEu6HUV7h0g6tDMyHK7qfD3mCQn1tq34AEXTkvlC1ndDj70U8C n+ZoFnkgokNxbfTEr/J+xDE6sRWkveSdvk3czhBRYWOyeoWVH1dVmLGnX3GRWw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1695649581; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=/4jOv4Qm9JLJQIFwq+/ta7a16X5ZiBZ/aSv6w+ROcqI=; b=oOiRECvaXAeEljEYCszKztiS6SrFodNRaXrcE0950AQ7PDTr6JbmorT1uIZpBIGwvSO4Sm AW/N3bx1OfKZLB/RZwL4Lz+X6zdIGxfF+toni4s/FLbiYKw3BsHbrnmZe77F2P8gsLYDv3 rnwU5W0oZ9gWw8TrgLBtOh1sO0a6TS6XuJ1YY+QUxOBAjCrap14FgxYHwjfbukFRLPX8my KFWEAWqpi2f9oGynAN2O4VGsh64jI78fdhUDoC/hQKyZUmN3coVVNQgztS//mRHTfpCGpG pwAQgneXrU3OgaRtgrzXG7IBsK52zv5qcXPHFxdW6g9ghxAZEC3GnxILeiwqiw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4RvPKm6C4bz1CT; Mon, 25 Sep 2023 13:46:20 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 38PDkKwB027805; Mon, 25 Sep 2023 13:46:20 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 38PDkKVh027802; Mon, 25 Sep 2023 13:46:20 GMT (envelope-from git) Date: Mon, 25 Sep 2023 13:46:20 GMT Message-Id: <202309251346.38PDkKVh027802@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Ed Maste Subject: git: d0c0dcf9db7e - stable/14 - x86: Add defines for workaround bits in AMD's MSR "Decode Configuration" List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: emaste X-Git-Repository: src X-Git-Refname: refs/heads/stable/14 X-Git-Reftype: branch X-Git-Commit: d0c0dcf9db7e558a58fbec2d49c293d118ea6979 Auto-Submitted: auto-generated The branch stable/14 has been updated by emaste: URL: https://cgit.FreeBSD.org/src/commit/?id=d0c0dcf9db7e558a58fbec2d49c293d118ea6979 commit d0c0dcf9db7e558a58fbec2d49c293d118ea6979 Author: Olivier Certner AuthorDate: 2023-09-11 13:10:35 +0000 Commit: Ed Maste CommitDate: 2023-09-25 13:45:06 +0000 x86: Add defines for workaround bits in AMD's MSR "Decode Configuration" They are a bit more informative than raw hexadecimal values. While here, sort existing defines of bits for AMD MSRs to match the address order. Reviewed by: kib, emaste Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D41816 (cherry picked from commit 125bbadf6084ac341673c9eb1979a740d3d5899a) --- sys/amd64/amd64/initcpu.c | 5 +++-- sys/x86/include/specialreg.h | 9 +++++++-- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index 4debe89426df..a048c08fc9ae 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -101,7 +101,8 @@ init_amd(void) case 0x10: case 0x12: if ((cpu_feature2 & CPUID2_HV) == 0) - wrmsr(MSR_DE_CFG, rdmsr(MSR_DE_CFG) | 1); + wrmsr(MSR_DE_CFG, rdmsr(MSR_DE_CFG) | + DE_CFG_10H_12H_STACK_POINTER_JUMP_FIX_BIT); break; } @@ -151,7 +152,7 @@ init_amd(void) (cpu_feature2 & CPUID2_HV) == 0) { /* 1021 */ msr = rdmsr(MSR_DE_CFG); - msr |= 0x2000; + msr |= DE_CFG_ZEN_LOAD_STALE_DATA_FIX_BIT; wrmsr(MSR_DE_CFG, msr); /* 1033 */ diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index 548d6010e7b8..f45990a056c8 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -1162,11 +1162,16 @@ #define MSR_IC_CFG 0xc0011021 /* Instruction Cache Configuration */ #define MSR_DE_CFG 0xc0011029 /* Decode Configuration */ +/* MSR_AMDK8_IPM */ +#define AMDK8_SMIONCMPHALT (1ULL << 27) +#define AMDK8_C1EONCMPHALT (1ULL << 28) + /* MSR_VM_CR related */ #define VM_CR_SVMDIS 0x10 /* SVM: disabled by BIOS */ -#define AMDK8_SMIONCMPHALT (1ULL << 27) -#define AMDK8_C1EONCMPHALT (1ULL << 28) +/* MSR_DE_CFG */ +#define DE_CFG_10H_12H_STACK_POINTER_JUMP_FIX_BIT 0x1 +#define DE_CFG_ZEN_LOAD_STALE_DATA_FIX_BIT 0x2000 /* VIA ACE crypto featureset: for via_feature_rng */ #define VIA_HAS_RNG 1 /* cpu has RNG */