From owner-svn-src-all@FreeBSD.ORG Thu Oct 23 11:57:58 2008 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 19D63106566B; Thu, 23 Oct 2008 11:57:58 +0000 (UTC) (envelope-from des@des.no) Received: from tim.des.no (tim.des.no [194.63.250.121]) by mx1.freebsd.org (Postfix) with ESMTP id C808C8FC1D; Thu, 23 Oct 2008 11:57:57 +0000 (UTC) (envelope-from des@des.no) Received: from ds4.des.no (des.no [84.49.246.2]) by smtp.des.no (Postfix) with ESMTP id A22606D449; Thu, 23 Oct 2008 11:57:56 +0000 (UTC) Received: by ds4.des.no (Postfix, from userid 1001) id 82B23844A6; Thu, 23 Oct 2008 13:57:56 +0200 (CEST) From: =?utf-8?Q?Dag-Erling_Sm=C3=B8rgrav?= To: "Attilio Rao" References: <200810210431.m9L4V7Pb088978@svn.freebsd.org> <3bbf2fe10810210307t664cc8a2s62606f03427286f3@mail.gmail.com> <200810211605.46927.jkim@FreeBSD.org> <3bbf2fe10810220853r34256b59y1fe57f49eca2014@mail.gmail.com> Date: Thu, 23 Oct 2008 13:57:56 +0200 In-Reply-To: <3bbf2fe10810220853r34256b59y1fe57f49eca2014@mail.gmail.com> (Attilio Rao's message of "Wed, 22 Oct 2008 17:53:50 +0200") Message-ID: <86bpxb34mz.fsf@ds4.des.no> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.0.60 (berkeley-unix) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org, Jung-uk Kim Subject: Re: svn commit: r184108 - head/sys/i386/i386 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Oct 2008 11:57:58 -0000 "Attilio Rao" writes: > I think it is silly we have different quirks flag states for TSC. We > should just having a table assuming that the TSC is safe to use in SMP > environments and gets rid of any other flag (in this case, for amd64 > based machine, the logic could, for example, check if the CPU is P > state invariant and assume it is safe, etc.) No, these are two entirely different things. An SMP-safe TSC is a TSC that is synchronized across cores / packages. A P-state invariant TSC is a TSC that does not vary with the CPU frequency. One does not imply the other, and in many cases (if not most), there is no way to detect programmatically that the TSC is SMP-safe or P-state invariant or both. DES --=20 Dag-Erling Sm=C3=B8rgrav - des@des.no