From owner-freebsd-mips@FreeBSD.ORG Tue Nov 6 21:37:48 2012 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 559222D8 for ; Tue, 6 Nov 2012 21:37:48 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-pb0-f54.google.com (mail-pb0-f54.google.com [209.85.160.54]) by mx1.freebsd.org (Postfix) with ESMTP id 223C38FC14 for ; Tue, 6 Nov 2012 21:37:47 +0000 (UTC) Received: by mail-pb0-f54.google.com with SMTP id rp8so754299pbb.13 for ; Tue, 06 Nov 2012 13:37:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=Qv00MCDfcmLFaZ3FsvEpOrDQ13MwM8dItHVSjSM+MuI=; b=d/xltFXeMsafqgOQ31aAmjmrvrQbHojsVldMLS4L/6QlsrAgE8ozg6ZoCGPcaHDFp+ nM04DKSLXD4FouUkJpk1MlV6p5VwFWTwaGr3T4bKsyw4v1PKTz/JkkFRxsmBzABN1IsG F4mRXoGIpjOkx75vk+foMr9bF8Dw0txwN0wiKCks7J0dI8FaZuE46JOa4dpsWhheYTH3 jzIF6+GS2iULuqfP6GaMDkB2BUo2rOlcBP5LGZpUJbOP7ohv208Ltl7QVPdnr3RbrP8p gY/M8PReHfszvFd2F134RyCKJNFL3SFf+80glAqiO++fdgA/ulLwaY5SF3ZBWHJMwZWm J/tQ== MIME-Version: 1.0 Received: by 10.68.137.41 with SMTP id qf9mr7189163pbb.103.1352237867638; Tue, 06 Nov 2012 13:37:47 -0800 (PST) Sender: adrian.chadd@gmail.com Received: by 10.68.124.130 with HTTP; Tue, 6 Nov 2012 13:37:47 -0800 (PST) In-Reply-To: <2E046873-B6A1-4F9C-8F3C-1CE6E60C6BF7@bsdimp.com> References: <201211051201.qA5C1rIo094612@pdx.rh.CN85.ChatUSA.com> <2E046873-B6A1-4F9C-8F3C-1CE6E60C6BF7@bsdimp.com> Date: Tue, 6 Nov 2012 13:37:47 -0800 X-Google-Sender-Auth: 3PGVPC5TXmNSU5-8TKcm3SUfvxI Message-ID: Subject: Re: CACHE_LINE_SIZE macro. From: Adrian Chadd To: Warner Losh Content-Type: text/plain; charset=ISO-8859-1 Cc: "Rodney W. Grimes" , Juli Mallett , "freebsd-mips@FreeBSD.org" X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Nov 2012 21:37:48 -0000 On 6 November 2012 13:35, Warner Losh wrote: > I think the real answer is to not abuse CACHE_LINE_SIZE for these things at all, but make it a per-arch decision... That way mips32 could, for example, not align and mips64 could if it wanted to... > > Having this be an ABI thing would be unfortunate. Right. This is why I initially replied to attilio/jeff/etc and asked why not separate out CACHE_LINE_SIZE from what you should use to align shared structures like mutexes (and atomics too..) Adrian