From owner-svn-src-stable@freebsd.org Wed Dec 12 12:46:14 2018 Return-Path: Delivered-To: svn-src-stable@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 771C6130CBAF; Wed, 12 Dec 2018 12:46:14 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 1AE0A91584; Wed, 12 Dec 2018 12:46:14 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id E572481FA; Wed, 12 Dec 2018 12:46:13 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id wBCCkDvK092148; Wed, 12 Dec 2018 12:46:13 GMT (envelope-from hselasky@FreeBSD.org) Received: (from hselasky@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id wBCCkBT9092100; Wed, 12 Dec 2018 12:46:11 GMT (envelope-from hselasky@FreeBSD.org) Message-Id: <201812121246.wBCCkBT9092100@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: hselasky set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky Date: Wed, 12 Dec 2018 12:46:11 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r341957 - in stable/12/sys: conf dev/mlx5 dev/mlx5/mlx5_accel dev/mlx5/mlx5_core dev/mlx5/mlx5_fpga dev/mlx5/mlx5_lib modules/mlx5 modules/mlx5en modules/mlx5ib X-SVN-Group: stable-12 X-SVN-Commit-Author: hselasky X-SVN-Commit-Paths: in stable/12/sys: conf dev/mlx5 dev/mlx5/mlx5_accel dev/mlx5/mlx5_core dev/mlx5/mlx5_fpga dev/mlx5/mlx5_lib modules/mlx5 modules/mlx5en modules/mlx5ib X-SVN-Commit-Revision: 341957 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 1AE0A91584 X-Spamd-Bar: / Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-0.80 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_SHORT(-0.80)[-0.799,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US] X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 12 Dec 2018 12:46:14 -0000 Author: hselasky Date: Wed Dec 12 12:46:11 2018 New Revision: 341957 URL: https://svnweb.freebsd.org/changeset/base/341957 Log: MFC r341572 and r341590: mlx5fpga: Initial code import. Submitted by: kib@ Sponsored by: Mellanox Technologies Added: stable/12/sys/dev/mlx5/mlx5_accel/ - copied from r341572, head/sys/dev/mlx5/mlx5_accel/ stable/12/sys/dev/mlx5/mlx5_fpga/ - copied from r341572, head/sys/dev/mlx5/mlx5_fpga/ stable/12/sys/dev/mlx5/mlx5_lib/ - copied from r341572, head/sys/dev/mlx5/mlx5_lib/ Modified: stable/12/sys/conf/files stable/12/sys/dev/mlx5/device.h stable/12/sys/dev/mlx5/driver.h stable/12/sys/dev/mlx5/mlx5_core/mlx5_core.h stable/12/sys/dev/mlx5/mlx5_core/mlx5_main.c stable/12/sys/dev/mlx5/mlx5_core/wq.h stable/12/sys/dev/mlx5/mlx5_ifc.h stable/12/sys/dev/mlx5/mlx5io.h stable/12/sys/modules/mlx5/Makefile stable/12/sys/modules/mlx5en/Makefile stable/12/sys/modules/mlx5ib/Makefile Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/conf/files ============================================================================== --- stable/12/sys/conf/files Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/conf/files Wed Dec 12 12:46:11 2018 (r341957) @@ -4792,6 +4792,8 @@ dev/mlx5/mlx5_core/mlx5_vsc.c optional mlx5 pci \ compile-with "${OFED_C}" dev/mlx5/mlx5_core/mlx5_wq.c optional mlx5 pci \ compile-with "${OFED_C}" +dev/mlx5/mlx5_lib/mlx5_gid.c optional mlx5 pci \ + compile-with "${OFED_C}" dev/mlx5/mlx5_en/mlx5_en_ethtool.c optional mlx5en pci inet inet6 \ compile-with "${OFED_C}" Modified: stable/12/sys/dev/mlx5/device.h ============================================================================== --- stable/12/sys/dev/mlx5/device.h Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/dev/mlx5/device.h Wed Dec 12 12:46:11 2018 (r341957) @@ -1034,6 +1034,12 @@ enum mlx5_qcam_feature_groups { #define MLX5_CAP_QCAM_FEATURE(mdev, fld) \ MLX5_GET(qcam_reg, (mdev)->caps.qcam, qos_feature_cap_mask.feature_cap.fld) +#define MLX5_CAP_FPGA(mdev, cap) \ + MLX5_GET(fpga_cap, (mdev)->caps.fpga, cap) + +#define MLX5_CAP64_FPGA(mdev, cap) \ + MLX5_GET64(fpga_cap, (mdev)->caps.fpga, cap) + enum { MLX5_CMD_STAT_OK = 0x0, MLX5_CMD_STAT_INT_ERR = 0x1, Modified: stable/12/sys/dev/mlx5/driver.h ============================================================================== --- stable/12/sys/dev/mlx5/driver.h Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/dev/mlx5/driver.h Wed Dec 12 12:46:11 2018 (r341957) @@ -40,6 +40,7 @@ #include #include #include +#include #include #include @@ -131,6 +132,10 @@ enum { MLX5_REG_DCBX_PARAM = 0x4020, MLX5_REG_DCBX_APP = 0x4021, MLX5_REG_PCAP = 0x5001, + MLX5_REG_FPGA_CAP = 0x4022, + MLX5_REG_FPGA_CTRL = 0x4023, + MLX5_REG_FPGA_ACCESS_REG = 0x4024, + MLX5_REG_FPGA_SHELL_CNTR = 0x4025, MLX5_REG_PMTU = 0x5003, MLX5_REG_PTYS = 0x5004, MLX5_REG_PAOS = 0x5006, @@ -404,6 +409,13 @@ struct mlx5_buf { u8 load_done; }; +struct mlx5_frag_buf { + struct mlx5_buf_list *frags; + int npages; + int size; + u8 page_shift; +}; + struct mlx5_eq { struct mlx5_core_dev *dev; __be32 __iomem *doorbell; @@ -442,6 +454,20 @@ struct mlx5_core_sig_ctx { u32 sigerr_count; }; +enum { + MLX5_MKEY_MR = 1, + MLX5_MKEY_MW, + MLX5_MKEY_MR_USER, +}; + +struct mlx5_core_mkey { + u64 iova; + u64 size; + u32 key; + u32 pd; + u32 type; +}; + struct mlx5_core_mr { u64 iova; u64 size; @@ -645,6 +671,14 @@ enum mlx5_pci_status { MLX5_PCI_STATUS_ENABLED, }; +#define MLX5_MAX_RESERVED_GIDS 8 + +struct mlx5_rsvd_gids { + unsigned int start; + unsigned int count; + struct ida ida; +}; + struct mlx5_special_contexts { int resd_lkey; }; @@ -663,6 +697,7 @@ struct mlx5_core_dev { u32 hca_caps_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)]; struct { u32 qcam[MLX5_ST_SZ_DW(qcam_reg)]; + u32 fpga[MLX5_ST_SZ_DW(fpga_cap)]; } caps; phys_addr_t iseg_base; struct mlx5_init_seg __iomem *iseg; @@ -691,6 +726,14 @@ struct mlx5_core_dev { struct sysctl_ctx_list sysctl_ctx; int msix_eqvec; + + struct { + struct mlx5_rsvd_gids reserved_gids; + atomic_t roce_en; + } roce; +#ifdef CONFIG_MLX5_FPGA + struct mlx5_fpga_device *fpga; +#endif }; enum { @@ -1105,6 +1148,11 @@ struct mlx5_interface { void *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol); int mlx5_register_interface(struct mlx5_interface *intf); void mlx5_unregister_interface(struct mlx5_interface *intf); + +unsigned int mlx5_core_reserved_gids_count(struct mlx5_core_dev *dev); +int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index, + u8 roce_version, u8 roce_l3_type, const u8 *gid, + const u8 *mac, bool vlan, u16 vlan_id); struct mlx5_profile { u64 mask; Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_core.h ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_core.h Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_core.h Wed Dec 12 12:46:11 2018 (r341957) @@ -85,6 +85,9 @@ void mlx5_enter_error_state(struct mlx5_core_dev *dev, void mlx5_disable_device(struct mlx5_core_dev *dev); void mlx5_recover_device(struct mlx5_core_dev *dev); +int mlx5_register_device(struct mlx5_core_dev *dev); +void mlx5_unregister_device(struct mlx5_core_dev *dev); + void mlx5e_init(void); void mlx5e_cleanup(void); Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_main.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_main.c Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_main.c Wed Dec 12 12:46:11 2018 (r341957) @@ -41,6 +41,8 @@ #include #include #include +#include +#include #include "mlx5_core.h" #include "fs_core.h" @@ -734,7 +736,8 @@ static void mlx5_remove_device(struct mlx5_interface * } } -static int mlx5_register_device(struct mlx5_core_dev *dev) +int +mlx5_register_device(struct mlx5_core_dev *dev) { struct mlx5_priv *priv = &dev->priv; struct mlx5_interface *intf; @@ -748,7 +751,8 @@ static int mlx5_register_device(struct mlx5_core_dev * return 0; } -static void mlx5_unregister_device(struct mlx5_core_dev *dev) +void +mlx5_unregister_device(struct mlx5_core_dev *dev) { struct mlx5_priv *priv = &dev->priv; struct mlx5_interface *intf; @@ -912,6 +916,9 @@ static int mlx5_init_once(struct mlx5_core_dev *dev, s mlx5_init_srq_table(dev); mlx5_init_mr_table(dev); + mlx5_init_reserved_gids(dev); + mlx5_fpga_init(dev); + #ifdef RATELIMIT err = mlx5_init_rl_table(dev); if (err) { @@ -941,6 +948,8 @@ static void mlx5_cleanup_once(struct mlx5_core_dev *de #ifdef RATELIMIT mlx5_cleanup_rl_table(dev); #endif + mlx5_fpga_cleanup(dev); + mlx5_cleanup_reserved_gids(dev); mlx5_cleanup_mr_table(dev); mlx5_cleanup_srq_table(dev); mlx5_cleanup_qp_table(dev); @@ -1075,6 +1084,12 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, st goto err_free_comp_eqs; } + err = mlx5_fpga_device_start(dev); + if (err) { + dev_err(&pdev->dev, "fpga device start failed %d\n", err); + goto err_fpga_start; + } + err = mlx5_register_device(dev); if (err) { dev_err(&pdev->dev, "mlx5_register_device failed %d\n", err); @@ -1088,6 +1103,7 @@ out: mutex_unlock(&dev->intf_state_mutex); return 0; +err_fpga_start: err_fs: mlx5_cleanup_fs(dev); @@ -1152,6 +1168,7 @@ static int mlx5_unload_one(struct mlx5_core_dev *dev, mlx5_unregister_device(dev); + mlx5_fpga_device_stop(dev); mlx5_cleanup_fs(dev); unmap_bf_area(dev); mlx5_wait_for_reclaim_vfs_pages(dev); Modified: stable/12/sys/dev/mlx5/mlx5_core/wq.h ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/wq.h Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/dev/mlx5/mlx5_core/wq.h Wed Dec 12 12:46:11 2018 (r341957) @@ -42,11 +42,22 @@ struct mlx5_wq_ctrl { struct mlx5_db db; }; +struct mlx5_frag_wq_ctrl { + struct mlx5_core_dev *mdev; + struct mlx5_frag_buf frag_buf; + struct mlx5_db db; +}; + struct mlx5_wq_cyc { void *buf; __be32 *db; u16 sz_m1; u8 log_stride; +}; + +struct mlx5_wq_qp { + struct mlx5_wq_cyc rq; + struct mlx5_wq_cyc sq; }; struct mlx5_cqwq { Modified: stable/12/sys/dev/mlx5/mlx5_ifc.h ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_ifc.h Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/dev/mlx5/mlx5_ifc.h Wed Dec 12 12:46:11 2018 (r341957) @@ -28,6 +28,8 @@ #ifndef MLX5_IFC_H #define MLX5_IFC_H +#include + enum { MLX5_EVENT_TYPE_COMP = 0x0, MLX5_EVENT_TYPE_PATH_MIG = 0x1, @@ -58,7 +60,9 @@ enum { MLX5_EVENT_TYPE_DROPPED_PACKET_LOGGED_EVENT = 0x1f, MLX5_EVENT_TYPE_CMD = 0xa, MLX5_EVENT_TYPE_PAGE_REQUEST = 0xb, - MLX5_EVENT_TYPE_NIC_VPORT_CHANGE = 0xd + MLX5_EVENT_TYPE_NIC_VPORT_CHANGE = 0xd, + MLX5_EVENT_TYPE_FPGA_ERROR = 0x20, + MLX5_EVENT_TYPE_FPGA_QP_ERROR = 0x21, }; enum { @@ -242,6 +246,11 @@ enum { MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c, MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d, MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e, + MLX5_CMD_OP_FPGA_CREATE_QP = 0x960, + MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961, + MLX5_CMD_OP_FPGA_QUERY_QP = 0x962, + MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963, + MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964, }; enum { @@ -998,7 +1007,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 max_tc[0x4]; u8 temp_warn_event[0x1]; u8 dcbx[0x1]; - u8 reserved_22[0x4]; + u8 general_notification_event[0x1]; + u8 reserved_at_1d3[0x2]; + u8 fpga[0x1]; u8 rol_s[0x1]; u8 rol_g[0x1]; u8 reserved_23[0x1]; Modified: stable/12/sys/dev/mlx5/mlx5io.h ============================================================================== --- stable/12/sys/dev/mlx5/mlx5io.h Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/dev/mlx5/mlx5io.h Wed Dec 12 12:46:11 2018 (r341957) @@ -57,4 +57,44 @@ struct mlx5_fwdump_get { #define MLX5_DEV_PATH _PATH_DEV"mlx5ctl" #endif +enum mlx5_fpga_id { + MLX5_FPGA_NEWTON = 0, + MLX5_FPGA_EDISON = 1, + MLX5_FPGA_MORSE = 2, +}; + +enum mlx5_fpga_image { + MLX5_FPGA_IMAGE_USER = 0, + MLX5_FPGA_IMAGE_FACTORY = 1, + MLX5_FPGA_IMAGE_MAX = MLX5_FPGA_IMAGE_FACTORY, + MLX5_FPGA_IMAGE_FACTORY_FAILOVER = 2, +}; + +enum mlx5_fpga_status { + MLX5_FPGA_STATUS_SUCCESS = 0, + MLX5_FPGA_STATUS_FAILURE = 1, + MLX5_FPGA_STATUS_IN_PROGRESS = 2, + MLX5_FPGA_STATUS_DISCONNECTED = 3, +}; + +struct mlx5_fpga_query { + enum mlx5_fpga_image admin_image; + enum mlx5_fpga_image oper_image; + enum mlx5_fpga_status image_status; +}; + +/** + * enum mlx5_fpga_access_type - Enumerated the different methods possible for + * accessing the device memory address space + */ +enum mlx5_fpga_access_type { + /** Use the slow CX-FPGA I2C bus*/ + MLX5_FPGA_ACCESS_TYPE_I2C = 0x0, + /** Use the fast 'shell QP' */ + MLX5_FPGA_ACCESS_TYPE_RDMA, + /** Use the fastest available method */ + MLX5_FPGA_ACCESS_TYPE_DONTCARE, + MLX5_FPGA_ACCESS_TYPE_MAX = MLX5_FPGA_ACCESS_TYPE_DONTCARE, +}; + #endif Modified: stable/12/sys/modules/mlx5/Makefile ============================================================================== --- stable/12/sys/modules/mlx5/Makefile Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/modules/mlx5/Makefile Wed Dec 12 12:46:11 2018 (r341957) @@ -1,5 +1,7 @@ # $FreeBSD$ -.PATH: ${SRCTOP}/sys/dev/mlx5/mlx5_core +.PATH: ${SRCTOP}/sys/dev/mlx5/mlx5_core \ + ${SRCTOP}/sys/dev/mlx5/mlx5_lib \ + ${SRCTOP}/sys/dev/mlx5/mlx5_fpga KMOD=mlx5 SRCS= \ @@ -29,11 +31,22 @@ mlx5_uar.c \ mlx5_vport.c \ mlx5_vsc.c \ mlx5_wq.c \ +mlx5_gid.c \ device_if.h bus_if.h vnode_if.h pci_if.h \ opt_inet.h opt_inet6.h opt_rss.h opt_ratelimit.h CFLAGS+= -I${SRCTOP}/sys/ofed/include CFLAGS+= -I${SRCTOP}/sys/compat/linuxkpi/common/include + +.if defined(CONFIG_BUILD_FPGA) +SRCS+= \ + mlx5fpga_cmd.c \ + mlx5fpga_core.c \ + mlx5fpga_sdk.c \ + mlx5fpga_trans.c \ + mlx5fpga_xfer.c \ + mlx5fpga_ipsec.c +.endif .include Modified: stable/12/sys/modules/mlx5en/Makefile ============================================================================== --- stable/12/sys/modules/mlx5en/Makefile Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/modules/mlx5en/Makefile Wed Dec 12 12:46:11 2018 (r341957) @@ -21,6 +21,10 @@ CFLAGS+= -DHAVE_PER_CQ_EVENT_PACKET CFLAGS+= -DHAVE_TCP_LRO_RX .endif +.if defined(CONFIG_BUILD_FPGA) +CFLAGS+= -DCONFIG_MLX5_FPGA +.endif + CFLAGS+= -I${SRCTOP}/sys/ofed/include CFLAGS+= -I${SRCTOP}/sys/compat/linuxkpi/common/include Modified: stable/12/sys/modules/mlx5ib/Makefile ============================================================================== --- stable/12/sys/modules/mlx5ib/Makefile Wed Dec 12 12:35:51 2018 (r341956) +++ stable/12/sys/modules/mlx5ib/Makefile Wed Dec 12 12:46:11 2018 (r341957) @@ -23,6 +23,10 @@ CFLAGS+= -I${SRCTOP}/sys/ofed/include/uapi CFLAGS+= -I${SRCTOP}/sys/compat/linuxkpi/common/include CFLAGS+= -DCONFIG_INFINIBAND_USER_MEM +.if defined(CONFIG_BUILD_FPGA) +CFLAGS+= -DCONFIG_MLX5_FPGA +.endif + .include CFLAGS+= -Wno-cast-qual -Wno-pointer-arith ${GCC_MS_EXTENSIONS}