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From: Joseph Koshy <jkoshy@FreeBSD.org>
Date: Thu, 29 Nov 2007 06:43:59 +0000 (UTC)
To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org
X-FreeBSD-CVS-Branch: HEAD
Cc: 
Subject: cvs commit: src/sys/dev/hwpmc hwpmc_x86.c
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jkoshy      2007-11-29 06:43:59 UTC

  FreeBSD src repository

  Modified files:
    sys/dev/hwpmc        hwpmc_x86.c 
  Log:
  Revert revision 1.4.
  
  Intel CPUs with family 0x6, model 0xE and later (i.e., Intel Core(TM))
  have a PMC architecture that differs somewhat from previous CPUs in
  family 0x6.  Even though the basic programming model is similar, the
  documented set of legal values that may be loaded into their PMC MSRs
  differs from that of the previous PMCs in family 0x6 and reusing bit
  values valid for the older PMCs could result in undefined behaviour in
  the general case.
  
  Revision  Changes    Path
  1.6       +1 -1      src/sys/dev/hwpmc/hwpmc_x86.c