From owner-freebsd-amd64@FreeBSD.ORG Sun Aug 13 06:18:16 2006 Return-Path: X-Original-To: freebsd-amd64@freebsd.org Delivered-To: freebsd-amd64@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id BCC4716A4DA for ; Sun, 13 Aug 2006 06:18:16 +0000 (UTC) (envelope-from andrew@areilly.bpc-users.org) Received: from omta02ps.mx.bigpond.com (omta02ps.mx.bigpond.com [144.140.83.154]) by mx1.FreeBSD.org (Postfix) with ESMTP id E5BE243D46 for ; Sun, 13 Aug 2006 06:18:15 +0000 (GMT) (envelope-from andrew@areilly.bpc-users.org) Received: from areilly.bpa.nu ([141.168.7.22]) by omta02ps.mx.bigpond.com with ESMTP id <20060813061813.MUOR10893.omta02ps.mx.bigpond.com@areilly.bpa.nu> for ; Sun, 13 Aug 2006 06:18:13 +0000 Received: (qmail 34476 invoked from network); 13 Aug 2006 06:17:42 -0000 Received: from duncan.reilly.home (10.0.0.6) by localhost with SMTP; 13 Aug 2006 06:17:42 -0000 Date: Sun, 13 Aug 2006 16:17:42 +1000 From: Andrew Reilly To: obrien@freebsd.org Message-ID: <20060813161742.3a8cdf54@duncan.reilly.home> In-Reply-To: <20060813010321.GC47774@dragon.NUXI.org> References: <..1153169042.squirrel@risei.net> <44BC8B44.8010900@uni-mainz.de> <20060813010321.GC47774@dragon.NUXI.org> X-Mailer: Sylpheed-Claws 2.4.0 (GTK+ 2.8.20; amd64-portbld-freebsd6.1) Mime-Version: 1.0 Content-Type: multipart/mixed; boundary=MP_9deCoY1TBdI6GJdoFQzsO0e Cc: freebsd-amd64@freebsd.org Subject: Re: NVE Timeout X-BeenThere: freebsd-amd64@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the AMD64 platform List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 13 Aug 2006 06:18:16 -0000 --MP_9deCoY1TBdI6GJdoFQzsO0e Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Disposition: inline On Sat, 12 Aug 2006 18:03:21 -0700 "David O'Brien" wrote: > On Tue, Jul 18, 2006 at 09:18:28AM +0200, O. Hartmann wrote: > > Is there any expected date when nfe will find its way into 6.X? > > Working to make it in 6.2-RELEASE. I don't know that it will be the > default driver for nVidia NIC's - I haven't decided wheather to leave > nve(4) as the default driver or not. More importantly (for me): will that include the ciphy patch that was associated with the nfe driver? (attached) That's the bit that I have to keep applying every time I track STABLE. The driver itself seems fairly stable and independent of minor kernel revisions. (And works great, for me.) Cheers, -- Andrew --MP_9deCoY1TBdI6GJdoFQzsO0e Content-Type: text/plain; name=ciphy.patch.txt Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=ciphy.patch.txt --- ciphy.c.orig Thu Jan 6 10:42:55 2005 +++ ciphy.c Sun Apr 30 00:15:58 2006 @@ -386,6 +386,12 @@ status = PHY_READ(sc, CIPHY_MII_AUXCSR); speed = status & CIPHY_AUXCSR_SPEED; + if (strcmp(device_get_name(device_get_parent(sc->mii_dev)), "nfe") == 0) { + /* need to set for 2.5V RGMII for NVIDIA adapters */ + PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_INTSEL_RGMII); + PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_IOVOL_2500MV); + } + switch (model) { case MII_MODEL_CICADA_CS8201: --- ciphyreg.h.orig Thu Jan 6 10:42:55 2005 +++ ciphyreg.h Sat Apr 29 23:36:27 2006 @@ -251,6 +251,16 @@ /* Extended PHY control register #1 */ #define CIPHY_MII_ECTL1 0x17 #define CIPHY_ECTL1_ACTIPHY 0x0020 /* Enable ActiPHY power saving */ +#define CIPHY_ECTL1_IOVOL 0x0e00 /* MAC interface and I/O voltage select */ +#define CIPHY_ECTL1_INTSEL 0xf000 /* select MAC interface */ + +#define CIPHY_IOVOL_3300MV 0x0000 /* 3.3V for I/O pins */ +#define CIPHY_IOVOL_2500MV 0x0200 /* 2.5V for I/O pins */ + +#define CIPHY_INTSEL_GMII 0x0000 /* GMII/MII */ +#define CIPHY_INTSEL_RGMII 0x1000 +#define CIPHY_INTSEL_TBI 0x2000 +#define CIPHY_INTSEL_RTBI 0x3000 /* Extended PHY control register #2 */ #define CIPHY_MII_ECTL2 0x18 --MP_9deCoY1TBdI6GJdoFQzsO0e--