From owner-freebsd-sparc64@FreeBSD.ORG Thu Nov 20 23:47:48 2003 Return-Path: Delivered-To: freebsd-sparc64@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 92ACE16A4CE; Thu, 20 Nov 2003 23:47:48 -0800 (PST) Received: from spider.deepcore.dk (cpe.atm2-0-53484.0x50a6c9a6.abnxx9.customer.tele.dk [80.166.201.166]) by mx1.FreeBSD.org (Postfix) with ESMTP id 4550343F75; Thu, 20 Nov 2003 23:47:47 -0800 (PST) (envelope-from sos@spider.deepcore.dk) Received: from spider.deepcore.dk (localhost [127.0.0.1]) by spider.deepcore.dk (8.12.10/8.12.10) with ESMTP id hAL7kEEQ082666; Fri, 21 Nov 2003 08:46:14 +0100 (CET) (envelope-from sos@spider.deepcore.dk) Received: (from sos@localhost) by spider.deepcore.dk (8.12.10/8.12.10/Submit) id hAL7kD4Z082665; Fri, 21 Nov 2003 08:46:13 +0100 (CET) (envelope-from sos) From: Soren Schmidt Message-Id: <200311210746.hAL7kD4Z082665@spider.deepcore.dk> In-Reply-To: <20031121014732.GA9102@timesink.dyndns.org> To: Thomas Moestl Date: Fri, 21 Nov 2003 08:46:13 +0100 (CET) X-Mailer: ELM [version 2.4ME+ PL99f (25)] MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=ISO-8859-1 X-mail-scanned: by DeepCore Virus & Spam killer v1.3 cc: Kris Kennaway cc: sos@FreeBSD.ORG cc: sparc64@FreeBSD.ORG Subject: Re: ultra5/cmd646 hang X-BeenThere: freebsd-sparc64@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Porting FreeBSD to the Sparc List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 Nov 2003 07:47:48 -0000 It seems Thomas Moestl wrote: > I've played around some more with panther2, and managed to get it to work > seemingly stable in WDMA2 mode by tweaking the initialization code a bit. > I've attached the patch which I have used; the following changes in it > seem to all be required: > > - Programming the timings before setting the transfer mode with > ata_controlcmd(atadev, ATA_SETFEATURES, ATA_SF_SETXFER, ...); Wierd, sounds like the machine doesn't set it up at all, which would make it hard to boot from ?? > - The added interrupt acking code in the chipset interrupt handler > (cribbed from NetBSD) That shouldn't be needed according to docs, but I'll look through the endless list of erratas for this.. > - #if 0-ing out the code that sets the PIO timings. I have not > yet investigated whether this is because of the PIO initialization > of the disk before DMA is tried, or causes troubles when used > for the secondary master, which is a PIO3 CD-ROM. This all sounds screwed somehow, I've just upgraded my alpha to the latest -current and there the '646 works just fine as is... -Søren