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Date:      Tue, 22 Apr 1997 01:00:51 +0800
From:      Peter Wemm <peter@spinner.dialix.com>
To:        Terry Lambert <terry@lambert.org>
Cc:        dfr@nlsystems.com, fsmp@freefall.freebsd.org, freebsd-smp@freefall.freebsd.org
Subject:   Re: cvs commit: sys/i386/i386 mp_machdep.c sys/i386/include smptests.h sys/i386/conf options.i386 sys/i386/isa clock.c isa.c 
Message-ID:  <199704211700.BAA24655@spinner.DIALix.COM>
In-Reply-To: Your message of "Mon, 21 Apr 1997 09:37:36 MST." <199704211637.JAA13674@phaeton.artisoft.com> 

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Terry Lambert wrote:
[...on detecting busted mptable...]
> Or ask them how NT copes?

I'm sticking my neck out here, I really do not remember exactly what 
happens (I've moved house recently, I have no idea where in hell my mpspec 
docs are at the moment), so here goes..

If my memory is correct, activating the apic is supposed to disable the 
diverted interrupts from being sent to the 8259's.  If that's the case, 
then it should be a ``simple'' matter of leaving the 8259 active..  Once 
the apic has gone online, the interrupts should (I think) be presented to 
the apic only.  On broken setups, the timer would go to the 8259 still.

I think the main problem is the imen masking system, it only supports 28 
interrupt sources, on the apic on typical 430HX pentium systems, there are 
24 irq sources (I presume the P6 boards have a similar apic), and another 
4 ipi sources put us at the limit.  We need to "fix" this somehow, 
probably by grouping the interrupts by class for spl masking, and do lazy 
masking for individual interrupt sources.  That could allow us to have 
more than one apic _and_ the 8259 "online", all going to seperate idt 
vectors.  That allows us to spread the vectors out too, to get benefit 
from the per-priority-level fifos.

I don't recall the specifics of why only one interrupt is supported via 
the daisy chaining at present.  I don't remember whether Steve was simply 
using AUTO_EOI and passing throught the trigger to the apic, or if it was 
to avoid having to have seperate masks, or whether it was to try and 
round-robin the timer across the cpus.

Cheers,
-Peter





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