From owner-svn-src-all@FreeBSD.ORG Tue Dec 4 00:37:18 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id F21667DA; Tue, 4 Dec 2012 00:37:17 +0000 (UTC) (envelope-from jkim@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id D5D508FC08; Tue, 4 Dec 2012 00:37:17 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.5/8.14.5) with ESMTP id qB40bH97098302; Tue, 4 Dec 2012 00:37:17 GMT (envelope-from jkim@svn.freebsd.org) Received: (from jkim@localhost) by svn.freebsd.org (8.14.5/8.14.5/Submit) id qB40bH2g098300; Tue, 4 Dec 2012 00:37:17 GMT (envelope-from jkim@svn.freebsd.org) Message-Id: <201212040037.qB40bH2g098300@svn.freebsd.org> From: Jung-uk Kim Date: Tue, 4 Dec 2012 00:37:17 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r243846 - in head/share: examples/etc mk X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Dec 2012 00:37:18 -0000 Author: jkim Date: Tue Dec 4 00:37:17 2012 New Revision: 243846 URL: http://svnweb.freebsd.org/changeset/base/243846 Log: Tidy up bsd.cpu.mk for X86 CPUs: - Do not limit recent processors to "prescott" class for i386 target. There is no reason for this hack because clang is default now. On top of that, it will only grow indefinitely over time. - Add more CPUTYPEs, i.e., "athlon-fx", "core-avx2", "atom", "penryn", and "yonah". Note "penryn" and "yonah" are intentionally undocumented because they are not supported by gcc and marked deprecated by clang. - Add more CPUTYPE aliases, i.e., "barcelona" (-> amdfam10), "westmere" and "nehalem" (-> corei7). Note these are intentionally undocumented because they are not supported by (base) gcc and/or clang. However, LLVM (backend) seems to "know" the differences. Most likely, they were deprecated with other vendor code names and clang did not bother implementing them at all. - Add i686 to MACHINE_CPU for "c3-2" (VIA Nehemiah). Both gcc & clang treat it like an i686-class processor. - Add IDT "winchip2" and "winchip-c6" for completeness (undocumented). - Order processors per make.conf example, i.e., CPU vendors and models. - Tidy up make.conf example, i.e., remove "by gcc" (because we have aliases) and remove "prescott" from AMD64 architecture (because it is not correct). Modified: head/share/examples/etc/make.conf head/share/mk/bsd.cpu.mk Modified: head/share/examples/etc/make.conf ============================================================================== --- head/share/examples/etc/make.conf Tue Dec 4 00:32:12 2012 (r243845) +++ head/share/examples/etc/make.conf Tue Dec 4 00:37:17 2012 (r243846) @@ -28,24 +28,25 @@ # of CFLAGS to contain the appropriate optimization directive to cc. # The automatic setting of CFLAGS may be overridden using the # NO_CPU_CFLAGS variable below. -# Currently the following CPU types are recognized by gcc: +# Currently the following CPU types are recognized: # Intel x86 architecture: # (AMD CPUs) opteron-sse3, athlon64-sse3, k8-sse3, opteron, -# athlon64, k8, athlon-mp, athlon-xp, athlon-4, -# athlon-tbird, athlon, k7, geode, k6-3, k6-2, k6, k5 +# athlon64, athlon-fx, k8, athlon-mp, athlon-xp, +# athlon-4, athlon-tbird, athlon, k7, geode, k6-3, +# k6-2, k6 # (Intel CPUs) core2, core, nocona, pentium4m, pentium4, prescott, # pentium3m, pentium3, pentium-m, pentium2, # pentiumpro, pentium-mmx, pentium, i486 # (VIA CPUs) c7, c3-2, c3 # AMD64 architecture: opteron-sse3, athlon64-sse3, k8-sse3, opteron, -# athlon64, k8, core2, nocona, prescott +# athlon64, k8, core2, nocona # Intel ia64 architecture: itanium2, itanium # SPARC-V9 architecture: v9 (generic 64-bit V9), ultrasparc (default # if omitted), ultrasparc3 # Additionally the following CPU types are recognized by clang: # Intel x86 architecture (for both amd64 and i386): # (AMD CPUs) bdver2, bdver1, btver1, amdfam10 -# (Intel CPUs) core-avx-i, corei7-avx, corei7 +# (Intel CPUs) core-avx2, core-avx-i, corei7-avx, corei7, atom # # (?= allows to buildworld for a different CPUTYPE.) # Modified: head/share/mk/bsd.cpu.mk ============================================================================== --- head/share/mk/bsd.cpu.mk Tue Dec 4 00:32:12 2012 (r243845) +++ head/share/mk/bsd.cpu.mk Tue Dec 4 00:37:17 2012 (r243846) @@ -27,9 +27,13 @@ MACHINE_CPU = mips # between e.g. i586 and pentium) . if ${MACHINE_CPUARCH} == "i386" -. if ${CPUTYPE} == "nocona" || ${CPUTYPE} == "core" || \ - ${CPUTYPE} == "core2" || ${CPUTYPE} == "corei7" || \ - ${CPUTYPE} == "corei7-avx" || ${CPUTYPE} == "core-avx-i" +. if ${CPUTYPE} == "barcelona" +CPUTYPE = amdfam10 +. elif ${CPUTYPE} == "k7" +CPUTYPE = athlon +. elif ${CPUTYPE} == "westmere" || ${CPUTYPE} == "nehalem" +CPUTYPE = corei7 +. elif ${CPUTYPE} == "core" CPUTYPE = prescott . elif ${CPUTYPE} == "p4" CPUTYPE = pentium4 @@ -49,18 +53,13 @@ CPUTYPE = pentiumpro CPUTYPE = pentium-mmx . elif ${CPUTYPE} == "i586" CPUTYPE = pentium -. elif ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3" || \ - ${CPUTYPE} == "k8-sse3" || ${CPUTYPE} == "amdfam10" || \ - ${CPUTYPE} == "btver1" || ${CPUTYPE} == "bdver1" || ${CPUTYPE} == "bdver2" -CPUTYPE = prescott -. elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \ - ${CPUTYPE} == "k8" -CPUTYPE = athlon-mp -. elif ${CPUTYPE} == "k7" -CPUTYPE = athlon . endif . elif ${MACHINE_CPUARCH} == "amd64" -. if ${CPUTYPE} == "prescott" +. if ${CPUTYPE} == "barcelona" +CPUTYPE = amdfam10 +. elif ${CPUTYPE} == "westmere" || ${CPUTYPE} == "nehalem" +CPUTYPE = corei7 +. elif ${CPUTYPE} == "prescott" CPUTYPE = nocona . endif . elif ${MACHINE_ARCH} == "sparc64" @@ -87,11 +86,11 @@ CPUTYPE = ultrasparc3 _CPUCFLAGS = -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0 . elif ${CPUTYPE} == "k5" _CPUCFLAGS = -march=pentium -. elif ${CPUTYPE} == "core2" -_CPUCFLAGS = -march=prescott +. elif ${CPUTYPE} == "c7" +_CPUCFLAGS = -march=c3-2 . else _CPUCFLAGS = -march=${CPUTYPE} -. endif # GCC on 'i386' +. endif . elif ${MACHINE_CPUARCH} == "amd64" _CPUCFLAGS = -march=${CPUTYPE} . elif ${MACHINE_CPUARCH} == "arm" @@ -143,7 +142,7 @@ _CPUCFLAGS = -mcpu=ultrasparc3 # presence of a CPU feature. . if ${MACHINE_CPUARCH} == "i386" -. if ${CPUTYPE} == "bdver1" || ${CPUTYPE} == "bdver2" +. if ${CPUTYPE} == "bdver2" || ${CPUTYPE} == "bdver1" MACHINE_CPU = xop avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "btver1" MACHINE_CPU = ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 @@ -151,7 +150,8 @@ MACHINE_CPU = ssse3 sse4a sse3 sse2 sse MACHINE_CPU = athlon-xp athlon k7 3dnow sse4a sse3 sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3" MACHINE_CPU = athlon-xp athlon k7 3dnow sse3 sse2 sse mmx k6 k5 i586 -. elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" +. elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \ + ${CPUTYPE} == "athlon-fx" MACHINE_CPU = athlon-xp athlon k7 3dnow sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "athlon-mp" || ${CPUTYPE} == "athlon-xp" || \ ${CPUTYPE} == "athlon-4" @@ -164,19 +164,17 @@ MACHINE_CPU = 3dnow mmx k6 k5 i586 MACHINE_CPU = mmx k6 k5 i586 . elif ${CPUTYPE} == "k5" MACHINE_CPU = k5 i586 -. elif ${CPUTYPE} == "c3" -MACHINE_CPU = 3dnow mmx i586 -. elif ${CPUTYPE} == "c3-2" -MACHINE_CPU = sse mmx i586 -. elif ${CPUTYPE} == "c7" -MACHINE_CPU = sse3 sse2 sse i686 mmx i586 -. elif ${CPUTYPE} == "corei7-avx" || ${CPUTYPE} == "core-avx-i" +. elif ${CPUTYPE} == "corei-avx2" +MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 +. elif ${CPUTYPE} == "core-avx-i" || ${CPUTYPE} == "corei7-avx" MACHINE_CPU = avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "corei7" MACHINE_CPU = sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 -. elif ${CPUTYPE} == "core2" +. elif ${CPUTYPE} == "penryn" +MACHINE_CPU = sse41 ssse3 sse3 sse2 sse i686 mmx i586 +. elif ${CPUTYPE} == "atom" || ${CPUTYPE} == "core2" MACHINE_CPU = ssse3 sse3 sse2 sse i686 mmx i586 -. elif ${CPUTYPE} == "prescott" +. elif ${CPUTYPE} == "yonah" || ${CPUTYPE} == "prescott" MACHINE_CPU = sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "pentium4" || ${CPUTYPE} == "pentium4m" || \ ${CPUTYPE} == "pentium-m" @@ -191,10 +189,20 @@ MACHINE_CPU = i686 i586 MACHINE_CPU = mmx i586 . elif ${CPUTYPE} == "pentium" MACHINE_CPU = i586 +. elif ${CPUTYPE} == "c7" +MACHINE_CPU = sse3 sse2 sse i686 mmx i586 +. elif ${CPUTYPE} == "c3-2" +MACHINE_CPU = sse i686 mmx i586 +. elif ${CPUTYPE} == "c3" +MACHINE_CPU = 3dnow mmx i586 +. elif ${CPUTYPE} == "winchip2" +MACHINE_CPU = 3dnow mmx +. elif ${CPUTYPE} == "winchip-c6" +MACHINE_CPU = mmx . endif MACHINE_CPU += i486 . elif ${MACHINE_CPUARCH} == "amd64" -. if ${CPUTYPE} == "bdver1" || ${CPUTYPE} == "bdver2" +. if ${CPUTYPE} == "bdver2" || ${CPUTYPE} == "bdver1" MACHINE_CPU = xop avx sse42 sse41 ssse3 sse4a sse3 . elif ${CPUTYPE} == "btver1" MACHINE_CPU = ssse3 sse4a sse3 @@ -204,13 +212,17 @@ MACHINE_CPU = k8 3dnow sse4a sse3 ${CPUTYPE} == "k8-sse3" MACHINE_CPU = k8 3dnow sse3 . elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \ - ${CPUTYPE} == "k8" + ${CPUTYPE} == "athlon-fx" || ${CPUTYPE} == "k8" MACHINE_CPU = k8 3dnow -. elif ${CPUTYPE} == "corei7-avx" || ${CPUTYPE} == "core-avx-i" +. elif ${CPUTYPE} == "corei-avx2" +MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse3 +. elif ${CPUTYPE} == "core-avx-i" || ${CPUTYPE} == "corei7-avx" MACHINE_CPU = avx sse42 sse41 ssse3 sse3 . elif ${CPUTYPE} == "corei7" MACHINE_CPU = sse42 sse41 ssse3 sse3 -. elif ${CPUTYPE} == "core2" +. elif ${CPUTYPE} == "penryn" +MACHINE_CPU = sse41 ssse3 sse3 +. elif ${CPUTYPE} == "atom" || ${CPUTYPE} == "core2" MACHINE_CPU = ssse3 sse3 . elif ${CPUTYPE} == "nocona" MACHINE_CPU = sse3