From owner-freebsd-smp Mon Jun 28 9:17:13 1999 Delivered-To: freebsd-smp@freebsd.org Received: from alpo.whistle.com (alpo.whistle.com [207.76.204.38]) by hub.freebsd.org (Postfix) with ESMTP id 1742015143 for ; Mon, 28 Jun 1999 09:17:10 -0700 (PDT) (envelope-from julian@whistle.com) Received: from current1.whistle.com (current1.whistle.com [207.76.205.22]) by alpo.whistle.com (8.9.1a/8.9.1) with SMTP id JAA19971; Mon, 28 Jun 1999 09:16:45 -0700 (PDT) Date: Mon, 28 Jun 1999 09:16:44 -0700 (PDT) From: Julian Elischer To: Matthew Dillon Cc: Peter Wemm , Alan Cox , Terry Lambert , Bakul Shah , freebsd-smp@freebsd.org Subject: Re: high-efficiency SMP locks - submission for review In-Reply-To: <199906281611.JAA22481@apollo.backplane.com> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-freebsd-smp@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.org I'd say that we probably wouldn't support SMP on 386 and 486 processors.. and in UP those locks that need atomicity would be optimised away. We WILL need locking in UP when we move to kernel threads, but that doesn't require bus atomicity. julian On Mon, 28 Jun 1999, Matthew Dillon wrote: > :Actually, I have a bigger issue with it.. cmpxchgl etc doesn't exist on > :all x86 cpus. To make a kernel that boots on the current cpus (including > :the 486) we either have to conditionalize the inlines or use the > :universally available (and implicitly locked) xchg instruction - but that's > :a test-and-set style operation rather than atomic_cmpex. > : > :Cheers, > :-Peter > > My "Intel486 Processor Family" book - note the 486, lists the cmpxchgl > instruction. Of course, I've never actually tried it on a 486. I dunno > whether the 386 implements it, though. > > -Matt > Matthew Dillon > > > To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message