From owner-freebsd-mips@FreeBSD.ORG Thu Feb 21 16:30:28 2013 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 3BBF3377; Thu, 21 Feb 2013 16:30:28 +0000 (UTC) (envelope-from ticso@cicely7.cicely.de) Received: from raven.bwct.de (raven.bwct.de [85.159.14.73]) by mx1.freebsd.org (Postfix) with ESMTP id DB3282B5; Thu, 21 Feb 2013 16:30:26 +0000 (UTC) Received: from mail.cicely.de ([10.1.1.37]) by raven.bwct.de (8.13.4/8.13.4) with ESMTP id r1LGUIl2043298 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 21 Feb 2013 17:30:18 +0100 (CET) (envelope-from ticso@cicely7.cicely.de) Received: from cicely7.cicely.de (cicely7.cicely.de [10.1.1.9]) by mail.cicely.de (8.14.5/8.14.4) with ESMTP id r1LGU4Zp074880 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 21 Feb 2013 17:30:04 +0100 (CET) (envelope-from ticso@cicely7.cicely.de) Received: from cicely7.cicely.de (localhost [127.0.0.1]) by cicely7.cicely.de (8.14.2/8.14.2) with ESMTP id r1LGU4Se017045; Thu, 21 Feb 2013 17:30:04 +0100 (CET) (envelope-from ticso@cicely7.cicely.de) Received: (from ticso@localhost) by cicely7.cicely.de (8.14.2/8.14.2/Submit) id r1LGU3xn017044; Thu, 21 Feb 2013 17:30:03 +0100 (CET) (envelope-from ticso) Date: Thu, 21 Feb 2013 17:30:03 +0100 From: Bernd Walter To: Patrick Kelsey Subject: Re: SPI, _sz fields in struct spi_command Message-ID: <20130221163003.GC12189@cicely7.cicely.de> References: <20130220142140.f8e5a616c75d72e2519dbc69@freebsd.org> <54C08D8E-4C5F-49AF-BEE6-D78EC05D2A24@bsdimp.com> <20130220174449.GB6976@cicely7.cicely.de> <20130221022655.6f693eb6.ray@freebsd.org> <20130221014433.GA12189@cicely7.cicely.de> <20130221163026.dbeb03f9c38de3d24a7ab30f@freebsd.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Operating-System: FreeBSD cicely7.cicely.de 7.0-STABLE i386 User-Agent: Mutt/1.5.11 X-Spam-Status: No, score=-2.9 required=5.0 tests=ALL_TRUSTED=-1, BAYES_00=-1.9, T_RP_MATCHES_RCVD=-0.01 autolearn=unavailable version=3.3.0 X-Spam-Checker-Version: SpamAssassin 3.3.0 (2010-01-18) on spamd.cicely.de Cc: Aleksandr Rybalko , Bernd Walter , freebsd-arm@freebsd.org, freebsd-mips@freebsd.org, ticso@cicely.de X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list Reply-To: ticso@cicely.de List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Feb 2013 16:30:28 -0000 On Thu, Feb 21, 2013 at 10:21:00AM -0500, Patrick Kelsey wrote: > >On Thu, Feb 21, 2013 at 9:30 AM, Aleksandr Rybalko wrote: > >> On Thu, 21 Feb 2013 02:44:33 +0100 > >> Bernd Walter wrote: > >> > >> On Thu, Feb 21, 2013 at 02:26:55AM +0200, Aleksandr Rybalko wrote: > >> > 2. teach consumers to give only correct numbers (very nice we have only > >> > two SPI devices in tree) > >> > > >> > After that we will be able to make drivers for some (potential) devices > >> > which will require bidirectional communication. And controllers which > >> > can't do that, will just report error in that. I believe peoples thinks > >> > before attach such devices to controllers, so we will not have such > >> > incompatibility. > >> > >> I don't think there are many devices requiring RX/TX at the same time. > > > > Anyway, we will be able to do that, and we don't care now because don't > > have such drivers yet. > > > > Taking the view that "RX/TX at the same time" means that one wants to > send meaningful data to the slave device at the same time one is > interested in what data is returned during that transmission, there > are such devices in use out there. Linear Technologies has several > ADCs, such as the LTC2446, for which you obtain the previous > conversion result while sending the configuration bits for the next > conversion to be performed. Forgot about ADC with channel selection. > Although this is slightly out of focus for the specific issue > originally raised, while on the topic of things that need to get done > on SPI in real systems, there are also devices out there that require > specific data or some number of clocks to be provided while chip > select is deasserted. One example of the former is the LTC2404, which > is a multichannel ADC for which the input channel for the next > conversion is selected by the last four bits clocked in *before* chip > select is asserted. One example of the latter is the spec for SPI > access to MMC/SD cards, which requires a certain number of clocks to > be applied with chip select deasserted in order to initialize the > card. If you ever find yourself wondering why an SPI software > interface provides independent bus acquisition and chip select > control, the reason is to support these types of devices. With many ADC you also want probing support. Assign CS and GPIO-read MISO for ready without clocking. Some flash chips also work this way. Not sure if AT45DB support this and how our driver works. With own projects I usually ask AT45DB about ready state by transfering a status word. -- B.Walter http://www.bwct.de Modbus/TCP Ethernet I/O Baugruppen, ARM basierte FreeBSD Rechner uvm.