From owner-cvs-sys Tue Apr 29 23:22:31 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.5/8.8.5) id XAA08399 for cvs-sys-outgoing; Tue, 29 Apr 1997 23:22:31 -0700 (PDT) Received: from godzilla.zeta.org.au (godzilla.zeta.org.au [203.2.228.19]) by hub.freebsd.org (8.8.5/8.8.5) with ESMTP id XAA08251; Tue, 29 Apr 1997 23:19:03 -0700 (PDT) Received: (from bde@localhost) by godzilla.zeta.org.au (8.8.5/8.6.9) id QAA07968; Wed, 30 Apr 1997 16:11:52 +1000 Date: Wed, 30 Apr 1997 16:11:52 +1000 From: Bruce Evans Message-Id: <199704300611.QAA07968@godzilla.zeta.org.au> To: cvs-all@FreeBSD.org, CVS-committers@FreeBSD.org, cvs-sys@FreeBSD.org, peter@freefall.FreeBSD.ORG Subject: Re: cvs commit: src/sys/i386/include spl.h src/sys/i386/isa vector.s Sender: owner-cvs-sys@FreeBSD.org X-Loop: FreeBSD.org Precedence: bulk > Modified: sys/i386/include spl.h > sys/i386/isa vector.s > Log: > Use a common numbering of the tty and net software interrupt levels > between the SMP and non-SMP case. It simplifies the #ifdef's, since > NHWI changes (at least for the moment) when APIC's are involved. This is a pessimization for the non-SMP case. It takes 3*N cycles on 386's and N cycles on [4-5]86's for the `bsfl' instruction to scan for the bits when they are N bits higher (N = 12 here). Bruce