Date: Fri, 14 Apr 2017 08:11:50 +0000 (UTC) From: Pyun YongHyeon <yongari@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r316820 - head/sys/dev/jme Message-ID: <201704140811.v3E8BoSa011805@repo.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: yongari Date: Fri Apr 14 08:11:50 2017 New Revision: 316820 URL: https://svnweb.freebsd.org/changeset/base/316820 Log: Don't overwrite mapped bits. Found by: PVS-Studio Modified: head/sys/dev/jme/if_jme.c Modified: head/sys/dev/jme/if_jme.c ============================================================================== --- head/sys/dev/jme/if_jme.c Fri Apr 14 07:27:23 2017 (r316819) +++ head/sys/dev/jme/if_jme.c Fri Apr 14 08:11:50 2017 (r316820) @@ -557,7 +557,7 @@ jme_map_intr_vector(struct jme_softc *sc bzero(map, sizeof(map)); /* Map Tx interrupts source to MSI/MSIX vector 2. */ - map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] |= MSINUM_INTR_SOURCE(2, N_INTR_TXQ0_COMP); map[MSINUM_REG_INDEX(N_INTR_TXQ1_COMP)] |= MSINUM_INTR_SOURCE(2, N_INTR_TXQ1_COMP); @@ -579,37 +579,37 @@ jme_map_intr_vector(struct jme_softc *sc MSINUM_INTR_SOURCE(2, N_INTR_TXQ_COAL_TO); /* Map Rx interrupts source to MSI/MSIX vector 1. */ - map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL_TO); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL_TO); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL_TO); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL_TO); /* Map all other interrupts source to MSI/MSIX vector 0. */
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201704140811.v3E8BoSa011805>