From owner-freebsd-smp Thu Sep 12 11:15:34 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id LAA20172 for smp-outgoing; Thu, 12 Sep 1996 11:15:34 -0700 (PDT) Received: from phaeton.artisoft.com (phaeton.Artisoft.COM [198.17.250.211]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id LAA20167 for ; Thu, 12 Sep 1996 11:15:32 -0700 (PDT) Received: (from terry@localhost) by phaeton.artisoft.com (8.6.11/8.6.9) id LAA07189; Thu, 12 Sep 1996 11:12:53 -0700 From: Terry Lambert Message-Id: <199609121812.LAA07189@phaeton.artisoft.com> Subject: Re: Intel XXpress - some SMP benchmarks To: smp@csn.net (Steve Passe) Date: Thu, 12 Sep 1996 11:12:53 -0700 (MST) Cc: peter@spinner.dialix.com, rv@groa.uct.ac.za, freebsd-smp@freebsd.org In-Reply-To: <199609120812.CAA15528@clem.systemsix.com> from "Steve Passe" at Sep 12, 96 02:12:56 am X-Mailer: ELM [version 2.4 PL24] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-smp@freebsd.org X-Loop: FreeBSD.org Precedence: bulk > > Hint: ALL the APIC ID registers are read/write. > > > > Can you see it yet? :-) > > we tried that on the XXPRESS and (Russel, please confirm this) an instant > reset of the hardware. Any chance that a write of the ID register acts as an INIT IPI? That's what seems to be implied. I suspect that you will need to inventory the processors, then back-fill the holes for the case where you would get an ID collision during the shuffling -- ie: if I have n processors, all APIC ID's < (n-1) are left alone, and only the remainder are rewritten. I *believe* that the BP is guranteed an APIC ID of 0. You may want to disassemble your MP cold boot BIOS code to see about the ID assignment; clearly it must be happening in BIOS in any case, since the PPRO's are "glueless" and would care about which slots they are put in, otherwise. Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.