From owner-freebsd-hardware@FreeBSD.ORG Mon Apr 5 22:51:38 2010 Return-Path: Delivered-To: freebsd-hardware@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DEFDA106566B for ; Mon, 5 Apr 2010 22:51:38 +0000 (UTC) (envelope-from bonomi@mail.r-bonomi.com) Received: from mail.r-bonomi.com (ns2.r-bonomi.com [204.87.227.129]) by mx1.freebsd.org (Postfix) with ESMTP id AA4A48FC15 for ; Mon, 5 Apr 2010 22:51:38 +0000 (UTC) Received: (from bonomi@localhost) by mail.r-bonomi.com (8.14.3/rdb1) id o35MdSbD004555; Mon, 5 Apr 2010 17:39:28 -0500 (CDT) Date: Mon, 5 Apr 2010 17:39:28 -0500 (CDT) From: Robert Bonomi Message-Id: <201004052239.o35MdSbD004555@mail.r-bonomi.com> To: freebsd-hardware@freebsd.org, freebsd-questions@freebsd.org Cc: Subject: Re: Intel D945GSE vs Zotac ION ITX (was: Support for Zotac MB with nVidia ION chipset) X-BeenThere: freebsd-hardware@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: General discussion of FreeBSD hardware List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Apr 2010 22:51:38 -0000 > From owner-freebsd-questions@freebsd.org Mon Apr 5 16:34:40 2010 > Date: Tue, 6 Apr 2010 07:34:05 +1000 > From: Peter Jeremy > To: Jeremie Le Hen > Cc: freebsd-questions@freebsd.org, freebsd-hardware@freebsd.org > Subject: Re: Intel D945GSE vs Zotac ION ITX (was: Support for Zotac MB with > nVidia ION chipset) > > > --n8g4imXOkfNTN/H1 > Content-Type: text/plain; charset=us-ascii > Content-Disposition: inline > Content-Transfer-Encoding: quoted-printable > > On 2010-Apr-05 12:20:12 +0200, Jeremie Le Hen wrote: > >Nonetheless I'm a little worried by what you said about the lack of ECC. > >Computers has been used for years before ECC came out and obviously they > >worked :). > > Not really. Most early computers had fairly extensive error detecting > hardware. Depends on what machines you're talking about. One fairly well-known supe-r computer class architecture from the mid 1960s ran without *any* error checking in the CPU *or* main memory. Dr. Seymour Cray analyzed things and concluded the significant extra component count for just doing 'parity' checking, let alone ECC made for a net _reduction_ in overall system reliability, *IF* the machine was run under very tightly controlled operating conditions -- the big ones being extremely stable power and a very limited temperature range. So, he specified the design to tight tolerances, and ran truely 'naked' hardward. Scary, but true. And, it worked. This was also a machine where, at any given moment, a fair part of the data in the CPU was 'in the wires' ("in transit" from one part of the CPU to another), and significant parts of the wiring harness had to be of _just_the_right_length_ (speed-of-light considerations) for the box to work. Incidentally, this computer COULD NOT ADD two numbers together. Literally!! It performed addition by 'complement and subtract'. Yeah, it -sounds- silly, but there were valid architectural reasons for it.