From owner-freebsd-bugs@FreeBSD.ORG Fri Sep 14 23:50:07 2007 Return-Path: Delivered-To: freebsd-bugs@hub.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1F51C16A417 for ; Fri, 14 Sep 2007 23:50:07 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2001:4f8:fff6::28]) by mx1.freebsd.org (Postfix) with ESMTP id F315813C428 for ; Fri, 14 Sep 2007 23:50:06 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (gnats@localhost [127.0.0.1]) by freefall.freebsd.org (8.14.1/8.14.1) with ESMTP id l8ENo6K6023784 for ; Fri, 14 Sep 2007 23:50:06 GMT (envelope-from gnats@freefall.freebsd.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.14.1/8.14.1/Submit) id l8ENo6CJ023783; Fri, 14 Sep 2007 23:50:06 GMT (envelope-from gnats) Date: Fri, 14 Sep 2007 23:50:06 GMT Message-Id: <200709142350.l8ENo6CJ023783@freefall.freebsd.org> To: freebsd-bugs@FreeBSD.org From: dfilter@FreeBSD.ORG (dfilter service) Cc: Subject: Re: kern/103841: commit references a PR X-BeenThere: freebsd-bugs@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: dfilter service List-Id: Bug reports List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 14 Sep 2007 23:50:07 -0000 The following reply was made to PR kern/103841; it has been noted by GNATS. From: dfilter@FreeBSD.ORG (dfilter service) To: bug-followup@FreeBSD.org Cc: Subject: Re: kern/103841: commit references a PR Date: Fri, 14 Sep 2007 23:44:17 +0000 (UTC) jkim 2007-09-14 23:44:11 UTC FreeBSD src repository Modified files: (Branch: RELENG_6) sys/dev/fdc fdc.c sys/dev/ic nec765.h sys/pc98/cbus fdc.c Log: MFC: sys/dev/fdc/fdc.c 1.310-1.313 sys/dev/ic/nec765.h 1.12, 1.13 sys/dev/pc98/fdc.c 1.167 - Enhanced floppy controllers have Data Rate Select Register (DSR) at 0x3f4. Use it to reset controller and to select data rate. According to Intel 80277AA datasheet, software reset behaves the same as DOR reset except that it is self clearing. National Semiconductor PC8477B datasheet says the same. As a side effect, we no longer use Configuration Control Register (CCR) at 0x3f7 for these controllers, which is often missing in modern hardware. - Assume floppy disk is not inserted when we have exhausted retries. This significantly reduces booting time when there is broken floppy disk drive, controller, cable, BIOS, etc. When the floppy controller interface is correctly implemented, disk change signal (DSKCHG) is reflected in the Digital Input Register (DIR) at 0x3f7. However, there are many cases that the signal is unusable. Moreover, some BIOS does not reserve the port at all. In those cases, the register may not function. - Fix style nits. PR: kern/103841 Revision Changes Path 1.307.2.4 +27 -8 src/sys/dev/fdc/fdc.c 1.11.8.1 +29 -23 src/sys/dev/ic/nec765.h 1.160.2.4 +2 -2 src/sys/pc98/cbus/fdc.c _______________________________________________ cvs-all@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/cvs-all To unsubscribe, send any mail to "cvs-all-unsubscribe@freebsd.org"