Date: Sun, 14 Mar 1999 12:46:07 -0800 From: Amancio Hasty <hasty@rah.star-gate.com> To: Matthew Dillon <dillon@apollo.backplane.com> Cc: Wes Peters <wes@softweyr.com>, Cory Kempf <ckempf@enigami.com>, Bill Paul <wpaul@skynet.ctr.columbia.edu>, freebsd-hackers@FreeBSD.ORG Subject: Re: Gigabit ethernet -- what am I doing wrong? Message-ID: <199903142046.MAA87857@rah.star-gate.com> In-Reply-To: Your message of "Sun, 14 Mar 1999 11:56:45 PST." <199903141956.LAA93779@apollo.backplane.com>
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Not sure what the problem here is . Can a network chipset designer create a chipset with a concept of a program store? The answer is yes , if they chose to implement a sloppy design thats a different issue. Amancio > > : > :If the pci device has the concept of a program store like in the case of > :a bt848 chipset it is conceivable for dma or internal operations to do a retry. > :It is a different issue if the network chipset designers chose not to have > :a programmable dma or process control like in the bt848 . > : > : > : Best Regards, > : Amancio > > I know of *NO* DMA device that can do 'retries' of the magnitude that would > be required, and this in any case does not solve the problem of the FIFO > overflowing. > > Network chipset designers tend to assume that they will be DMAing to or > from main memory somewhere such that the DMA will not get 'stuck'. > FIFOs are typically only large enough to hold a packet or two, and many > can only hold a partial packet. > > -Matt > To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
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