From owner-freebsd-smp Fri Nov 5 10:11:40 1999 Delivered-To: freebsd-smp@freebsd.org Received: from palrel1.hp.com (palrel1.hp.com [156.153.255.242]) by hub.freebsd.org (Postfix) with ESMTP id 41C6914C36 for ; Fri, 5 Nov 1999 10:11:34 -0800 (PST) (envelope-from darrylo@sr.hp.com) Received: from postal.sr.hp.com (postal.sr.hp.com [15.4.46.173]) by palrel1.hp.com (Postfix) with ESMTP id 5294012D; Fri, 5 Nov 1999 10:09:55 -0800 (PST) Received: from mina.sr.hp.com (root@mina.sr.hp.com [15.4.42.247]) by postal.sr.hp.com with ESMTP (8.8.6 (PHNE_17190)/8.7.3 TIS 5.0) id KAA12942; Fri, 5 Nov 1999 10:09:59 -0800 (PST) Received: from localhost (darrylo@mina.sr.hp.com [15.4.42.247]) by mina.sr.hp.com with ESMTP (8.8.6 (PHNE_17135)/8.7.3 TIS 5.0) id KAA25476; Fri, 5 Nov 1999 10:09:47 -0800 (PST) Message-Id: <199911051809.KAA25476@mina.sr.hp.com> To: "Rodney W. Grimes" Cc: freebsd-smp@FreeBSD.ORG Subject: Re: Dual Celeron + FreeBSD? Reply-To: Darryl Okahata In-reply-to: Your message of "Thu, 04 Nov 1999 23:59:54 PST." <199911050759.XAA52797@gndrsh.dnsmgr.net> Mime-Version: 1.0 (generated by tm-edit 7.108) Content-Type: text/plain; charset=US-ASCII Date: Fri, 05 Nov 1999 10:09:46 -0800 From: Darryl Okahata Sender: owner-freebsd-smp@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.org "Rodney W. Grimes" wrote: > > These days, I'm not sure dual Celerons make sense. Unless you > > overclock (which I don't recommend, for all the usual reasons), you're > > only saving, oh, US$200-$230 compared to a comparable Pentium II-based > > system. Also, because of the small 128K L2 cache and the 66MHz bus (no > > overclocking, remember?), dual Celerons aren't as fast as dual P2s. > > See other posting on this... real world can;t tell between 128K L2 and > 256K L2. The 66 vs 100Mhz bus can make a difference, but were doing > all our Celeron stuff in PPGA370 with slot/1 adapters and running > the bus at 100Mhz so we are technically overclocking the FSB, but > leaving the core at normal speed, and thus didn't take that into > factor when doing our tests. Huh? All Celerons are multiplier-locked. How are you able to decouple the FSB from the core? Don't get me wrong: I'm not against the idea of dual Celerons (my home system is a dual C400 using slot-1 adapters), but, if you really *need* SMP (as opposed to just playing with it), you're generally better off with P2s or above. The 100MHz FSB and the larger (but slower) L2 cache of P2s and above will give you slightly better performance (unless you overclock), *ASSUMING* that you have some application that actually takes full advantage of SMP and utilizes all processors simultaneously. For casual use, where all SMP processors aren't fully utilized, dual Celerons may make sense. However, if you really, really need SMP, you're best off not using dual Celerons, unless you're on a really tight budget. -- Darryl Okahata darrylo@sr.hp.com DISCLAIMER: this message is the author's personal opinion and does not constitute the support, opinion, or policy of Agilent Technologies, or of the little green men that have been following him all day. To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message